| /external/llvm/test/CodeGen/X86/ |
| 2010-06-14-fast-isel-fs-load.ll | 1 ; RUN: llc -fast-isel -march=x86 < %s | grep %fs:
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| 2011-03-30-CreateFixedObjCrash.ll | 1 ; RUN: llc < %s -march=x86
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| 2011-12-06-BitcastVectorGlobal.ll | 1 ; RUN: llc < %s -march=x86-64 | FileCheck %s
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| combine-lds.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep fldl | count 1
|
| extend.ll | 1 ; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | grep movzx | count 1
2 ; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | grep movsx | count 1
|
| illegal-vector-args-return.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem | grep "mulpd %xmm3, %xmm1"
2 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem | grep "mulpd %xmm2, %xmm0"
3 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem | grep "addps %xmm3, %xmm1"
4 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem | grep "addps %xmm2, %xmm0"
|
| lit.local.cfg | 4 if not 'X86' in targets:
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| mul-remat.ll | 1 ; RUN: llc < %s -march=x86 | grep mov | count 1
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| mul128.ll | 1 ; RUN: llc < %s -march=x86-64 | grep mul | count 3
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| mul64.ll | 1 ; RUN: llc < %s -march=x86 | grep mul | count 3
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| negative_zero.ll | 1 ; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3 | grep fchs
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| rem-2.ll | 1 ; RUN: llc < %s -march=x86 | not grep cltd
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| shift-coalesce.ll | 1 ; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
3 ; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
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| shrink-fp-const2.ll | 1 ; RUN: llc < %s -march=x86 | grep flds
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| sse42_64.ll | 3 declare i64 @llvm.x86.sse42.crc32.64.8(i64, i8) nounwind
4 declare i64 @llvm.x86.sse42.crc32.64.64(i64, i64) nounwind
7 %tmp = call i64 @llvm.x86.sse42.crc32.64.8(i64 %a, i8 %b)
15 %tmp = call i64 @llvm.x86.sse42.crc32.64.64(i64 %a, i64 %b)
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| urem-i8-constant.ll | 1 ; RUN: llc < %s -march=x86 | grep 111
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| v4f32-immediate.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse | grep movaps
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| vec_shuffle-11.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2
2 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin | not grep mov
5 %tmp131 = call <2 x i64> @llvm.x86.sse2.psrl.dq( <2 x i64> < i64 -1, i64 -1 >, i32 96 ) ; <<2 x i64>> [#uses=1]
11 declare <2 x i64> @llvm.x86.sse2.psrl.dq(<2 x i64>, i32)
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| weak.ll | 1 ; RUN: llc < %s -march=x86
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| x86-64-ret0.ll | 1 ; RUN: llc < %s -march=x86-64 | grep mov | count 1
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| /external/llvm/test/CodeGen/X86/GC/ |
| lit.local.cfg | 4 if not 'X86' in targets:
|
| /external/llvm/test/DebugInfo/X86/ |
| lit.local.cfg | 4 if not 'X86' in targets:
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| /external/llvm/test/MC/COFF/ |
| lit.local.cfg | 4 if not 'X86' in targets:
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| /external/llvm/test/MC/ELF/ |
| lit.local.cfg | 4 if not 'X86' in targets:
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| /external/llvm/test/MC/MachO/ |
| lit.local.cfg | 4 if not 'X86' in targets:
|
