| /external/kernel-headers/original/asm-x86/ |
| auxvec.h | 5 * for more of them, start the x86-specific ones at 32.
15 #else /* else it's non-compat x86-64 */
|
| /external/llvm/test/CodeGen/X86/ |
| 2008-08-17-UComiCodeGenBug.ll | 5 tail call i32 @llvm.x86.sse.ucomige.ss( <4 x float> %a, <4 x float> %b ) nounwind readnone
9 declare i32 @llvm.x86.sse.ucomige.ss(<4 x float>, <4 x float>) nounwind readnone
|
| 2008-09-05-sinttofp-2xi32.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mattr=+mmx | not grep unpcklpd
2 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mattr=+mmx | not grep unpckhpd
3 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep cvttpd2pi | count 1
4 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep cvtpi2pd | count 1
24 %y = tail call <2 x double> @llvm.x86.sse.cvtpi2pd(x86_mmx %x)
30 %y = tail call x86_mmx @llvm.x86.sse.cvttpd2pi (<2 x double> %x)
34 declare <2 x double> @llvm.x86.sse.cvtpi2pd(x86_mmx)
35 declare x86_mmx @llvm.x86.sse.cvttpd2pi(<2 x double>)
|
| 2008-09-25-sseregparm-1.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movs | count 2
2 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep fld | count 2
|
| 2008-12-12-PrivateEHSymbol.ll | 1 ; RUN: llc < %s -disable-cfi -march=x86-64 -mtriple=x86_64-apple-darwin9 | grep ^__Z1fv.eh
2 ; RUN: llc < %s -disable-cfi -march=x86 -mtriple=i386-apple-darwin9 | grep ^__Z1fv.eh
|
| bitcast2.ll | 1 ; RUN: llc < %s -march=x86-64 | grep movd | count 2
2 ; RUN: llc < %s -march=x86-64 | not grep rsp
|
| compare_folding.ll | 1 ; RUN: llc < %s -march=x86 -mcpu=yonah | \
3 ; RUN: llc < %s -march=x86 -mcpu=yonah | \
|
| fast-cc-merge-stack-adj.ll | 1 ; RUN: llc < %s -mcpu=generic -march=x86 -x86-asm-syntax=intel | \
|
| fildll.ll | 1 ; RUN: llc < %s -march=x86 -x86-asm-syntax=att -mattr=-sse2 | grep fildll | count 2
|
| fmul-zero.ll | 1 ; RUN: llc < %s -march=x86-64 -enable-unsafe-fp-math | not grep mulps
2 ; RUN: llc < %s -march=x86-64 | grep mulps
|
| fold-imm.ll | 1 ; RUN: llc < %s -march=x86 | grep inc
2 ; RUN: llc < %s -march=x86 | grep add | grep 4
|
| h-registers-3.ll | 1 ; RUN: llc < %s -march=x86 | grep mov | count 1
2 ; RUN: llc < %s -march=x86-64 | grep mov | count 1
|
| subreg-to-reg-0.ll | 1 ; RUN: llc < %s -march=x86-64 | grep mov | count 1
4 ; x86-64's implicit zero-extension!
|
| vec_shift3.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psllq
2 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psraw
3 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movd | count 2
7 %tmp3 = tail call <2 x i64> @llvm.x86.sse2.pslli.q( <2 x i64> %x1, i32 %bits ) nounwind readnone ; <<2 x i64>> [#uses=1]
13 %tmp3 = tail call <2 x i64> @llvm.x86.sse2.pslli.q( <2 x i64> %x1, i32 10 ) nounwind readnone ; <<2 x i64>> [#uses=1]
20 %tmp4 = tail call <8 x i16> @llvm.x86.sse2.psrai.w( <8 x i16> %tmp2, i32 %bits ) nounwind readnone ; <<8 x i16>> [#uses=1]
25 declare <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16>, i32) nounwind readnone
26 declare <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64>, i32) nounwind readnone
|
| mmx-punpckhdq.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+mmx,+sse42 -mtriple=x86_64-apple-darwin10 | FileCheck %s
13 tail call void @llvm.x86.mmx.emms( )
24 %tmp9 = tail call x86_mmx @llvm.x86.mmx.punpckhdq (x86_mmx %tmp2, x86_mmx %tmp2)
26 tail call void @llvm.x86.mmx.emms( )
30 declare x86_mmx @llvm.x86.mmx.punpckhdq(x86_mmx, x86_mmx)
31 declare void @llvm.x86.mmx.emms()
|
| avx-intrinsics-x86.ll | 1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -march=x86 -mcpu=corei7-avx | FileCheck %s
5 %res = call <2 x i64> @llvm.x86.aesni.aesdec(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1]
8 declare <2 x i64> @llvm.x86.aesni.aesdec(<2 x i64>, <2 x i64>) nounwind readnone
13 %res = call <2 x i64> @llvm.x86.aesni.aesdeclast(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1]
16 declare <2 x i64> @llvm.x86.aesni.aesdeclast(<2 x i64>, <2 x i64>) nounwind readnone
21 %res = call <2 x i64> @llvm.x86.aesni.aesenc(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1]
24 declare <2 x i64> @llvm.x86.aesni.aesenc(<2 x i64>, <2 x i64>) nounwind readnone
29 %res = call <2 x i64> @llvm.x86.aesni.aesenclast(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1]
32 declare <2 x i64> @llvm.x86.aesni.aesenclast(<2 x i64>, <2 x i64>) nounwind readnone
37 %res = call <2 x i64> @llvm.x86.aesni.aesimc(<2 x i64> %a0) ; <<2 x i64>> [#uses=1
[all...] |
| fma3-intrinsics.ll | 7 %res = call <4 x float> @llvm.x86.fma.vfmadd.ss(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) nounwind
10 declare <4 x float> @llvm.x86.fma.vfmadd.ss(<4 x float>, <4 x float>, <4 x float>) nounwind readnone
14 %res = call <4 x float> @llvm.x86.fma.vfmadd.ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) nounwind
17 declare <4 x float> @llvm.x86.fma.vfmadd.ps(<4 x float>, <4 x float>, <4 x float>) nounwind readnone
21 %res = call <8 x float> @llvm.x86.fma.vfmadd.ps.256(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) nounwind
24 declare <8 x float> @llvm.x86.fma.vfmadd.ps.256(<8 x float>, <8 x float>, <8 x float>) nounwind readnone
28 %res = call <4 x float> @llvm.x86.fma.vfnmadd.ss(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) nounwind
31 declare <4 x float> @llvm.x86.fma.vfnmadd.ss(<4 x float>, <4 x float>, <4 x float>) nounwind readnone
35 %res = call <4 x float> @llvm.x86.fma.vfnmadd.ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) nounwind
38 declare <4 x float> @llvm.x86.fma.vfnmadd.ps(<4 x float>, <4 x float>, <4 x float>) nounwind readnon
[all...] |
| vec_shift.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psllw
2 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psrlq
3 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psraw
9 %tmp9 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> %tmp8, <8 x i16> %tmp6 ) nounwind readnone ; <<8 x i16>> [#uses=1]
19 %tmp9 = tail call <8 x i16> @llvm.x86.sse2.psra.w( <8 x i16> %tmp2, <8 x i16> %tmp8 ) ; <<8 x i16>> [#uses=1]
24 declare <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16>, <8 x i16>) nounwind readnone
28 %tmp9 = tail call <2 x i64> @llvm.x86.sse2.psrl.q( <2 x i64> %b1, <2 x i64> %c ) nounwind readnone ; <<2 x i64>> [#uses=1]
32 declare <2 x i64> @llvm.x86.sse2.psrl.q(<2 x i64>, <2 x i64>) nounwind readnone
34 declare <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16>, <8 x i16>) nounwind readnone
|
| /dalvik/vm/ |
| dalvik | 21 ANDROID_ROOT=$ANDROID_BUILD_TOP/out/host/linux-x86 \
22 LD_LIBRARY_PATH=$ANDROID_BUILD_TOP/out/host/linux-x86/lib \
23 exec $ANDROID_BUILD_TOP/out/host/linux-x86/bin/dalvikvm \
25 :$ANDROID_BUILD_TOP/out/host/linux-x86/framework/core-hostdex.jar\
26 :$ANDROID_BUILD_TOP/out/host/linux-x86/framework/bouncycastle-hostdex.jar\
27 :$ANDROID_BUILD_TOP/out/host/linux-x86/framework/apache-xml-hostdex.jar \
|
| /external/valgrind/main/none/tests/x86/ |
| Makefile.am | 28 bug125959-x86.stderr.exp bug125959-x86.stdout.exp bug125959-x86.vgtest \
29 bug126147-x86.stderr.exp bug126147-x86.stdout.exp bug126147-x86.vgtest \
30 bug132813-x86.stderr.exp bug132813-x86.stdout.exp bug132813-x86.vgtest \
31 bug135421-x86.stderr.exp bug135421-x86.stdout.exp bug135421-x86.vgtest
[all...] |
| /external/valgrind/main/VEX/auxprogs/ |
| genoffsets.c | 82 // x86
83 GENOFFSET(X86,x86,EAX);
84 GENOFFSET(X86,x86,EBX);
85 GENOFFSET(X86,x86,ECX);
86 GENOFFSET(X86,x86,EDX);
87 GENOFFSET(X86,x86,ESI)
[all...] |
| /external/valgrind/main/coregrind/m_gdbserver/ |
| valgrind-low-x86.c | 127 VexGuestX86State* x86 = (VexGuestX86State*) get_arch (set, tst); local
132 case 0: VG_(transfer) (&x86->guest_EAX, buf, dir, size, mod); break;
133 case 1: VG_(transfer) (&x86->guest_ECX, buf, dir, size, mod); break;
134 case 2: VG_(transfer) (&x86->guest_EDX, buf, dir, size, mod); break;
135 case 3: VG_(transfer) (&x86->guest_EBX, buf, dir, size, mod); break;
136 case 4: VG_(transfer) (&x86->guest_ESP, buf, dir, size, mod); break;
137 case 5: VG_(transfer) (&x86->guest_EBP, buf, dir, size, mod); break;
138 case 6: VG_(transfer) (&x86->guest_ESI, buf, dir, size, mod); break;
139 case 7: VG_(transfer) (&x86->guest_EDI, buf, dir, size, mod); break;
140 case 8: VG_(transfer) (&x86->guest_EIP, buf, dir, size, mod); break
[all...] |
| /ndk/docs/ |
| CPU-X86.html | 1 <html><body><pre>Android NDK x86 (a.k.a. IA-32) instruction set support
7 Android NDK r6 added support for the 'x86' ABI, that allows native code to
11 The Android x86 ABI itself is fully specified in docs/CPU-ARCH-ABIS.html.
16 Generating x86 machine code is simple: just add 'x86' to your APP_ABI
19 APP_ABI := armeabi armeabi-v7a x86
32 As you would expect, generated libraries will go into $PROJECT/libs/x86/, and
33 will be embedded into your .apk under /lib/x86/.
36 libraries on a *compatible* x86-based device automatically at install time,
48 It is possible to use the x86 toolchain with NDK r6 in stand-alone mode
[all...] |
| /external/clang/test/Driver/ |
| gold-lto.c | 5 // RUN: | FileCheck %s --check-prefix=CHECK-X86-64-BASIC
6 // CHECK-X86-64-BASIC: "-plugin" "{{.*}}/LLVMgold.so"
7 // CHECK-X86-64-BASIC: "-plugin-opt=foo"
11 // RUN: | FileCheck %s --check-prefix=CHECK-X86-64-COREI7
12 // CHECK-X86-64-COREI7: "-plugin" "{{.*}}/LLVMgold.so"
13 // CHECK-X86-64-COREI7: "-plugin-opt=mcpu=corei7"
14 // CHECK-X86-64-COREI7: "-plugin-opt=foo"
|
| /external/oprofile/m4/ |
| configmodule.m4 | 43 AC_MSG_CHECKING(for x86 architecture)
44 AX_KERNEL_OPTION(CONFIG_X86, x86=1, x86=0)
45 AX_KERNEL_OPTION(CONFIG_X86_WP_WORKS_OK, x86=1, x86=$x86)
46 AX_MSG_RESULT_YN($x86)
47 test "$x86" = 1 && arch="x86"
|
