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  /prebuilts/tools/linux-x86/sdl/
PREBUILT 6 $ ./android-configure.sh --prefix=$ANDROID/prebuilts/tools/linux-x86/sdl
14 $ cp objs/libs/libSDL.a $ANDROID/prebuilts/tools/linux-x86/sdl/libs/lib64SDL.a
15 $ cp objs/libs/libSDLmain.a $ANDROID/prebuilts/linux-x86/sdl/libs/lib64SDLmain.a
  /external/llvm/test/CodeGen/X86/
sse_reload_fold.ll 12 declare <4 x float> @llvm.x86.sse.rsqrt.ps(<4 x float>)
13 declare <4 x float> @llvm.x86.sse.sqrt.ps(<4 x float>)
14 declare <4 x float> @llvm.x86.sse.rcp.ps(<4 x float>)
15 declare <4 x float> @llvm.x86.sse.min.ps(<4 x float>, <4 x float>)
16 declare <4 x float> @llvm.x86.sse.max.ps(<4 x float>, <4 x float>)
17 declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8)
18 declare <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float>, <4 x float>)
19 declare <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float>, <4 x float>)
20 declare <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float>, <4 x float>)
21 declare <2 x double> @llvm.x86.sse2.sqrt.pd(<2 x double>
    [all...]
sse42.ll 4 declare i32 @llvm.x86.sse42.crc32.32.8(i32, i8) nounwind
5 declare i32 @llvm.x86.sse42.crc32.32.16(i32, i16) nounwind
6 declare i32 @llvm.x86.sse42.crc32.32.32(i32, i32) nounwind
9 %tmp = call i32 @llvm.x86.sse42.crc32.32.8(i32 %a, i8 %b)
20 %tmp = call i32 @llvm.x86.sse42.crc32.32.16(i32 %a, i16 %b)
31 %tmp = call i32 @llvm.x86.sse42.crc32.32.32(i32 %a, i32 %b)
2006-05-22-FPSetEQ.ll 1 ; RUN: llc < %s -march=x86 -mattr=-sse | grep setnp
2 ; RUN: llc < %s -march=x86 -mattr=-sse -enable-unsafe-fp-math -enable-no-nans-fp-math | \
atomic-load-store-wide.ll 1 ; RUN: llc < %s -march=x86 -verify-machineinstrs | FileCheck %s
3 ; 64-bit load/store on x86-32
fast-cc-callee-pops.ll 1 ; RUN: llc < %s -march=x86 -x86-asm-syntax=intel -mcpu=yonah | FileCheck %s
fast-isel-tailcall.ll 1 ; RUN: llc < %s -fast-isel -tailcallopt -march=x86 | not grep add
4 ; On x86, -tailcallopt changes the ABI so the caller shouldn't readjust
lea-2.ll 1 ; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | FileCheck %s
mmx-insert-element.ll 1 ; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | grep movq
2 ; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | grep pshufd
mul-shift-reassoc.ll 1 ; RUN: llc < %s -march=x86 | grep lea
2 ; RUN: llc < %s -march=x86 | not grep add
sse-load-ret.ll 1 ; RUN: llc < %s -march=x86 -mcpu=yonah | not grep movss
2 ; RUN: llc < %s -march=x86 -mcpu=yonah | not grep xmm
store-fp-constant.ll 1 ; RUN: llc < %s -march=x86 | not grep rodata
2 ; RUN: llc < %s -march=x86 | not grep literal
volatile.ll 1 ; RUN: llc < %s -march=x86 -mattr=sse2 | grep movsd | count 5
2 ; RUN: llc < %s -march=x86 -mattr=sse2 -O0 | grep -v esp | grep movsd | count 5
zext-inreg-1.ll 1 ; RUN: llc < %s -march=x86 | not grep and
4 ; on x86-64 they do require and instructions.
  /dalvik/vm/mterp/
config-x86 22 asm-stub x86/stub.S
25 asm-alt-stub x86/alt_stub.S
29 import x86/header.S
38 op-start x86
50 import x86/entry.S
61 import x86/footer.S
  /external/clang/test/CodeGen/
avx-cmp-builtins.c 14 // CHECK: @llvm.x86.sse2.cmp.pd({{.*}}, i8 13)
20 // CHECK: @llvm.x86.sse.cmp.ps({{.*}}, i8 13)
26 // CHECK: @llvm.x86.avx.cmp.pd.256({{.*}}, i8 13)
32 // CHECK: @llvm.x86.avx.cmp.ps.256({{.*}}, i8 13)
38 // CHECK: @llvm.x86.sse2.cmp.sd({{.*}}, i8 13)
44 // CHECK: @llvm.x86.sse.cmp.ss({{.*}}, i8 13)
bmi2-builtins.c 10 // CHECK: @llvm.x86.bmi.bzhi.32
15 // CHECK: @llvm.x86.bmi.pdep.32
20 // CHECK: @llvm.x86.bmi.pext.32
34 // CHECK: @llvm.x86.bmi.bzhi.64
39 // CHECK: @llvm.x86.bmi.pdep.64
44 // CHECK: @llvm.x86.bmi.pext.64
sse4a-builtins.c 8 // CHECK: @llvm.x86.sse4a.extrqi(<2 x i64> %{{[^,]+}}, i8 3, i8 2)
14 // CHECK: @llvm.x86.sse4a.extrq(<2 x i64> %{{[^,]+}}, <16 x i8> %{{[^,]+}})
20 // CHECK: @llvm.x86.sse4a.insertqi(<2 x i64> %{{[^,]+}}, <2 x i64> %{{[^,]+}}, i8 5, i8 6)
26 // CHECK: @llvm.x86.sse4a.insertq(<2 x i64> %{{[^,]+}}, <2 x i64> %{{[^,]+}})
32 // CHECK: @llvm.x86.sse4a.movnt.sd(i8* %{{[^,]+}}, <2 x double> %{{[^,]+}})
38 // CHECK: @llvm.x86.sse4a.movnt.ss(i8* %{{[^,]+}}, <4 x float> %{{[^,]+}})
  /external/clang/test/CodeGenCXX/
mangle-valist.cpp 36 // RUN: | FileCheck -check-prefix=MANGLE-X86 %s
37 // CHECK-MANGLE-X86: @_ZN5test15test1EPKcPc
38 // CHECK-MANGLE-X86: @_ZN5Test25test2EPKcPc
42 // RUN: | FileCheck -check-prefix=MANGLE-X86-64 %s
43 // CHECK-MANGLE-X86-64: @_ZN5test15test1EPKcP13__va_list_tag
44 // CHECK-MANGLE-X86-64: @_ZN5Test25test2EPKcP13__va_list_tag
  /external/libffi/
Libffi.mk 33 ifeq ($(ffi_os)-$(ffi_arch),linux-x86)
34 LOCAL_SRC_FILES := src/x86/ffi.c src/x86/sysv.S
37 ifeq ($(ffi_os)-$(ffi_arch),darwin-x86)
38 LOCAL_SRC_FILES := src/x86/ffi.c src/x86/darwin.S
Makefile.am 27 src/sparc/ffi.c src/x86/darwin64.S \
28 src/x86/ffi.c src/x86/sysv.S src/x86/win32.S src/x86/darwin.S \
29 src/x86/freebsd.S \
30 src/x86/ffi64.c src/x86/unix64.S src/x86/ffitarget.h \
96 if X86
    [all...]
  /external/clang/test/CodeGenObjC/
try.m 1 // REQUIRES: x86-registered-target,x86-64-registered-target
  /external/llvm/test/ExecutionEngine/MCJIT/
lit.local.cfg 11 if ('X86' in targets) | ('ARM' in targets) | ('Mips' in targets) | \
17 if root.host_arch not in ['x86', 'x86_64', 'ARM', 'Mips', 'PowerPC']:
  /external/llvm/test/MC/ELF/
fde-reloc.s 1 // RUN: llvm-mc -filetype=obj %s -o - -triple x86_64-pc-linux | llvm-objdump -r - | FileCheck --check-prefix=X86-64 %s
10 // X86-64: R_X86_64_PC32
  /external/llvm/test/Transforms/InstCombine/
2008-07-16-sse2_storel_dq.ll 9 call void @llvm.x86.sse2.storel.dq( i8* bitcast (double* @G to i8*), <4 x i32> %0 ) nounwind
13 declare void @llvm.x86.sse2.storel.dq(i8*, <4 x i32>) nounwind

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