/external/llvm/include/llvm/IR/ |
IntrinsicsX86.td | 1 //===- IntrinsicsX86.td - Defines X86 intrinsics -----------*- tablegen -*-===// 10 // This file defines all of the X86-specific intrinsics. 16 let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". 23 let TargetPrefix = "x86" in { 82 let TargetPrefix = "x86" in { 101 let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". 147 let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86." [all...] |
/external/llvm/test/CodeGen/X86/ |
avx2-intrinsics-x86.ll | 1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -march=x86 -mcpu=core-avx2 -mattr=avx2 | FileCheck %s 5 %res = call <16 x i16> @llvm.x86.avx2.packssdw(<8 x i32> %a0, <8 x i32> %a1) ; <<16 x i16>> [#uses=1] 8 declare <16 x i16> @llvm.x86.avx2.packssdw(<8 x i32>, <8 x i32>) nounwind readnone 13 %res = call <32 x i8> @llvm.x86.avx2.packsswb(<16 x i16> %a0, <16 x i16> %a1) ; <<32 x i8>> [#uses=1] 16 declare <32 x i8> @llvm.x86.avx2.packsswb(<16 x i16>, <16 x i16>) nounwind readnone 21 %res = call <32 x i8> @llvm.x86.avx2.packuswb(<16 x i16> %a0, <16 x i16> %a1) ; <<32 x i8>> [#uses=1] 24 declare <32 x i8> @llvm.x86.avx2.packuswb(<16 x i16>, <16 x i16>) nounwind readnone 29 %res = call <32 x i8> @llvm.x86.avx2.padds.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] 32 declare <32 x i8> @llvm.x86.avx2.padds.b(<32 x i8>, <32 x i8>) nounwind readnone 37 %res = call <16 x i16> @llvm.x86.avx2.padds.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1 [all...] |
sjlj.ll | 1 ; RUN: llc < %s -mtriple=i386-pc-linux -mcpu=corei7 -relocation-model=static | FileCheck --check-prefix=X86 %s 23 ; X86: sj0 24 ; x86: movl %ebp, buf 25 ; X86: movl %esp, buf+8 26 ; x86: movl ${{.*LBB.*}}, buf+4 27 ; X86: ret 50 ; X86: lj0 51 ; X86: movl buf, %ebp 52 ; X86: movl buf+4, %[[REG32:.*]] 53 ; X86: movl buf+8, %es [all...] |
mmx-arith.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+mmx 16 %tmp12 = tail call x86_mmx @llvm.x86.mmx.padds.b( x86_mmx %tmp4a, x86_mmx %tmp7 ) ; <x86_mmx> [#uses=2] 19 %tmp21 = tail call x86_mmx @llvm.x86.mmx.paddus.b( x86_mmx %tmp12, x86_mmx %tmp16 ) ; <x86_mmx> [#uses=2] 28 %tmp36 = tail call x86_mmx @llvm.x86.mmx.psubs.b( x86_mmx %tmp28a, x86_mmx %tmp31 ) ; <x86_mmx> [#uses=2] 31 %tmp45 = tail call x86_mmx @llvm.x86.mmx.psubus.b( x86_mmx %tmp36, x86_mmx %tmp40 ) ; <x86_mmx> [#uses=2] 55 tail call void @llvm.x86.mmx.emms( ) 97 tail call void @llvm.x86.mmx.emms( ) 111 %tmp12 = tail call x86_mmx @llvm.x86.mmx.padds.w( x86_mmx %tmp4a, x86_mmx %tmp7 ) ; <x86_mmx> [#uses=2] 114 %tmp21 = tail call x86_mmx @llvm.x86.mmx.paddus.w( x86_mmx %tmp12, x86_mmx %tmp16 ) ; <x86_mmx> [#uses=2] 123 %tmp36 = tail call x86_mmx @llvm.x86.mmx.psubs.w( x86_mmx %tmp28a, x86_mmx %tmp31 ) ; <x86_mmx> [#uses=2 [all...] |
2003-08-23-DeadBlockTest.ll | 1 ; RUN: llc < %s -march=x86
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2004-02-22-Casts.ll | 1 ; RUN: llc < %s -march=x86
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2004-10-08-SelectSetCCFold.ll | 1 ; RUN: llc < %s -march=x86
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2006-11-27-SelectLegalize.ll | 1 ; RUN: llc < %s -march=x86 | grep test.*1
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2007-01-29-InlineAsm-ir.ll | 1 ; RUN: llc < %s -march=x86
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2007-07-03-GR64ToVR64.ll | 13 %tmp7 = tail call x86_mmx @llvm.x86.mmx.paddus.w( x86_mmx %tmp6, x86_mmx %tmp4 ) ; <x86_mmx> [#uses=1] 15 tail call void @llvm.x86.mmx.emms( ) 19 declare x86_mmx @llvm.x86.mmx.paddus.w(x86_mmx, x86_mmx) 20 declare void @llvm.x86.mmx.emms()
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2007-08-01-LiveVariablesBug.ll | 1 ; RUN: llc < %s -march=x86 | not grep movl
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2007-08-10-SignExtSubreg.ll | 1 ; RUN: llc < %s -march=x86 | grep "movsbl"
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2007-08-13-AppendingLinkage.ll | 1 ; RUN: llc < %s -march=x86 | not grep drectve
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2008-02-14-BitMiscompile.ll | 1 ; RUN: llc < %s -march=x86 | grep and
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/external/libvpx/libvpx/vp8/ |
vp8cx.mk | 89 VP8_CX_SRCS-$(HAVE_MMX) += encoder/x86/dct_mmx.asm 90 VP8_CX_SRCS-$(HAVE_MMX) += encoder/x86/subtract_mmx.asm 91 VP8_CX_SRCS-$(HAVE_MMX) += encoder/x86/vp8_enc_stubs_mmx.c 92 VP8_CX_SRCS-$(HAVE_SSE2) += encoder/x86/dct_sse2.asm 93 VP8_CX_SRCS-$(HAVE_SSE2) += encoder/x86/fwalsh_sse2.asm 94 VP8_CX_SRCS-$(HAVE_SSE2) += encoder/x86/quantize_sse2.asm 97 VP8_CX_SRCS-$(HAVE_SSE2) += encoder/x86/denoising_sse2.c 99 vp8/encoder/x86/denoising_sse2.c.o: CFLAGS += -msse2 103 VP8_CX_SRCS-$(HAVE_SSE2) += encoder/x86/subtract_sse2.asm 104 VP8_CX_SRCS-$(HAVE_SSE2) += encoder/x86/temporal_filter_apply_sse2.as [all...] |
/ndk/build/tools/toolchain-patches/mclinker/ |
0002-Compile-agsint-llvm-3.2.patch | 15 lib/Target/X86/X86Emulation.cpp | 3 +-- 16 lib/Target/X86/X86LDBackend.cpp | 3 +-- 59 diff --git a/lib/Target/X86/X86Emulation.cpp b/lib/Target/X86/X86Emulation.cpp 61 --- a/lib/Target/X86/X86Emulation.cpp 62 +++ b/lib/Target/X86/X86Emulation.cpp 66 assert (arch == Triple::x86 || arch == Triple::x86_64); 67 - if (arch == Triple::x86 || 69 + if (arch == Triple::x86) { 73 diff --git a/lib/Target/X86/X86LDBackend.cpp b/lib/Target/X86/X86LDBackend.cp [all...] |
/external/llvm/lib/Target/X86/ |
X86FastISel.cpp | 1 //===-- X86FastISel.cpp - X86 FastISel implementation ---------------------===// 10 // This file defines the X86-specific support for the FastISel class. Much 16 #include "X86.h" 48 /// RegInfo - X86 register info. 168 // We only handle legal types. For example, on x86-32 the instruction 169 // selector contains all of the 64-bit instructions from x86-64, 189 Opc = X86::MOV8rm; 190 RC = &X86::GR8RegClass; 193 Opc = X86::MOV16rm; 194 RC = &X86::GR16RegClass [all...] |
X86TargetObjectFile.h | 1 //===-- X86TargetObjectFile.h - X86 Object Info -----------------*- C++ -*-===// 20 /// x86-64. 35 /// X86LinuxTargetObjectFile - This implementation is used for linux x86 36 /// and x86-64.
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/dalvik/vm/compiler/codegen/x86/libenc/ |
Android.mk | 17 # Only include the x86 encoder/decoder for x86 architecture 18 ifeq ($(TARGET_ARCH),x86) 65 endif # ifeq ($(TARGET_ARCH),x86)
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/development/sdk/ |
images_x86_source.prop_template | 6 SystemImage.Abi=x86
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/device/generic/mini-emulator-x86/ |
mini_emulator_x86.mk | 15 $(call inherit-product, device/generic/x86/mini_x86.mk) 20 PRODUCT_DEVICE := mini-emulator-x86 22 PRODUCT_MODEL := mini-emulator-x86 24 LOCAL_KERNEL := prebuilts/qemu-kernel/x86/3.4/kernel-qemu
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/external/clang/test/Frontend/ |
ir-support-codegen.ll | 1 ; REQUIRES: x86-64-registered-target
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/external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/org.eclipse.equinox.launcher.gtk.linux.x86_1.1.2.R36x_v20101019_1345/META-INF/ |
MANIFEST.MF | 5 Bundle-Localization: launcher.gtk.linux.x86 9 Bundle-SymbolicName: org.eclipse.equinox.launcher.gtk.linux.x86;single 14 agments/org.eclipse.equinox.launcher.gtk.linux.x86;tag=R36x_v20101019 22 Name: launcher.gtk.linux.x86.properties
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/external/javassist/ |
build.properties | 4 lib.dir=../../out/host/linux-x86/framework
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/external/kernel-headers/original/asm-x86/ |
mmu.h | 8 * The x86 doesn't have a mmu context, but
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