| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.cpp | 1 //===-- X86InstrInfo.cpp - X86 Instruction Information --------------------===//
10 // This file contains the X86 implementation of the TargetInstrInfo class.
15 #include "X86.h"
49 " fuse, but the X86 backend currently can't"),
95 ? X86::ADJCALLSTACKDOWN64
96 : X86::ADJCALLSTACKDOWN32),
98 ? X86::ADJCALLSTACKUP64
99 : X86::ADJCALLSTACKUP32)),
103 { X86::ADC32ri, X86::ADC32mi, 0 }
[all...] |
| X86RegisterInfo.cpp | 1 //===-- X86RegisterInfo.cpp - X86 Register Information --------------------===//
10 // This file contains the X86 implementation of the TargetRegisterInfo class.
12 // on X86.
17 #include "X86.h"
54 EnableBasePointer("x86-use-base-pointer", cl::Hidden, cl::init(true),
60 ? X86::RIP : X86::EIP),
64 ? X86::RIP : X86::EIP)),
75 StackPtr = X86::RSP
[all...] |
| /bionic/libc/arch-x86/ |
| syscalls.mk | 3 syscall_src += arch-x86/syscalls/_exit.S
4 syscall_src += arch-x86/syscalls/_exit_thread.S
5 syscall_src += arch-x86/syscalls/__fork.S
6 syscall_src += arch-x86/syscalls/_waitpid.S
7 syscall_src += arch-x86/syscalls/__waitid.S
8 syscall_src += arch-x86/syscalls/wait4.S
9 syscall_src += arch-x86/syscalls/__sys_clone.S
10 syscall_src += arch-x86/syscalls/execve.S
11 syscall_src += arch-x86/syscalls/__setuid.S
12 syscall_src += arch-x86/syscalls/getuid.
[all...] |
| /external/valgrind/main/memcheck/tests/x86/ |
| xor-undef-x86.vgtest | 2 prog: xor-undef-x86
3 prereq: ../../../tests/x86_amd64_features x86-sse
|
| /external/valgrind/main/none/tests/x86/ |
| bug137714-x86.vgtest | 1 prog: bug137714-x86
2 prereq: ../../../tests/x86_amd64_features x86-sse2
|
| /dalvik/vm/mterp/x86/ |
| OP_ADD_INT_LIT16.S | 2 %include "x86/binopLit16.S" {"instr":"addl %ecx,%eax"}
|
| OP_ADD_INT_LIT8.S | 2 %include "x86/binopLit8.S" {"instr":"addl %ecx,%eax"}
|
| OP_AGET_BOOLEAN.S | 2 %include "x86/OP_AGET.S" { "load":"movzbl", "shift":"1" }
|
| OP_AGET_BYTE.S | 2 %include "x86/OP_AGET.S" { "load":"movsbl", "shift":"1" }
|
| OP_AGET_CHAR.S | 2 %include "x86/OP_AGET.S" { "load":"movzwl", "shift":"2" }
|
| OP_AGET_SHORT.S | 2 %include "x86/OP_AGET.S" { "load":"movswl", "shift":"2" }
|
| OP_AND_INT_LIT16.S | 2 %include "x86/binopLit16.S" {"instr":"andl %ecx,%eax"}
|
| OP_AND_INT_LIT8.S | 2 %include "x86/binopLit8.S" {"instr":"andl %ecx,%eax"}
|
| OP_CMPG_FLOAT.S | 2 %include "x86/OP_CMPG_DOUBLE.S" {"is_double":"0","nanval":"1"}
|
| OP_CMPL_DOUBLE.S | 2 %include "x86/OP_CMPG_DOUBLE.S" {"is_double":"1","nanval":"-1"}
|
| OP_CMPL_FLOAT.S | 2 %include "x86/OP_CMPG_DOUBLE.S" {"is_double":"0","nanval":"-1"}
|
| OP_DOUBLE_TO_FLOAT.S | 2 %include "x86/fpcvt.S" {"load":"fldl","store":"fstps"}
|
| OP_DOUBLE_TO_INT.S | 2 %include "x86/cvtfp_int.S" {"srcdouble":"1","tgtlong":"0"}
|
| OP_DOUBLE_TO_LONG.S | 2 %include "x86/cvtfp_int.S" {"srcdouble":"1","tgtlong":"1"}
|
| OP_FILLED_NEW_ARRAY_RANGE.S | 2 %include "x86/OP_FILLED_NEW_ARRAY.S" { "isrange":"1" }
|
| OP_FLOAT_TO_DOUBLE.S | 2 %include "x86/fpcvt.S" {"load":"flds","store":"fstpl"}
|
| OP_FLOAT_TO_INT.S | 2 %include "x86/cvtfp_int.S" {"srcdouble":"0","tgtlong":"0"}
|
| OP_FLOAT_TO_LONG.S | 2 %include "x86/cvtfp_int.S" {"srcdouble":"0","tgtlong":"1"}
|
| OP_IF_EQ.S | 2 %include "x86/bincmp.S" { "revcmp":"ne" }
|
| OP_IF_EQZ.S | 2 %include "x86/zcmp.S" { "revcmp":"ne" }
|
