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Searched
refs:MIPS
(Results
176 - 185
of
185
) sorted by null
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/prebuilts/ndk/7/sources/cxx-stl/stlport/stlport/stl/
_deque.h
113
#if defined (_STLP_MSVC) && (_STLP_MSVC <= 1401) && defined (
MIPS
) && defined (NDEBUG)
[
all
...]
/prebuilts/ndk/8/sources/cxx-stl/stlport/stlport/stl/
_deque.h
113
#if defined (_STLP_MSVC) && (_STLP_MSVC <= 1401) && defined (
MIPS
) && defined (NDEBUG)
[
all
...]
/external/webkit/Source/JavaScriptCore/assembler/
MacroAssemblerMIPS.h
3
* Copyright (C) 2010
MIPS
Technologies, Inc. All rights reserved.
14
* THIS SOFTWARE IS PROVIDED BY
MIPS
TECHNOLOGIES, INC. ``AS IS'' AND ANY
17
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
MIPS
TECHNOLOGIES, INC. OR
30
#if ENABLE(ASSEMBLER) && CPU(
MIPS
)
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all
...]
/external/webkit/Source/JavaScriptCore/jit/
JITArithmetic.cpp
872
#if CPU(X86) || CPU(X86_64) || CPU(
MIPS
)
[
all
...]
JITPropertyAccess32_64.cpp
625
#if CPU(
MIPS
) || CPU(SH4)
626
// For
MIPS
, we don't add sizeof(void*) to the stack offset.
[
all
...]
JITOpcodes.cpp
241
#elif CPU(
MIPS
)
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all
...]
/system/core/libpixelflinger/codeflinger/
MIPSAssembler.cpp
19
/*
MIPS
assembler and ARM->
MIPS
assembly translator
24
** instruction is translated to one or more
Mips
instructions as necessary. This
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** significant performance gains on
Mips
compared to the generic pixel pipeline.
32
** - The register allocator has been modified to re-map Arm registers 0-15 to
mips
33
** registers 2-17.
Mips
register 0 cannot be used as general-purpose register,
68
// Choose
MIPS
arch variant following gcc flags
209
// do not need this for
MIPS
, but it is in the Interface (virtual)
213
// for
MIPS
, any 32-bit immediate is OK
223
// for
MIPS
, any 32-bit immediate is O
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/external/libffi/
configure
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...]
/prebuilts/devtools/tools/lib/
sdklib.jar
/external/dropbear/libtomcrypt/
crypt.tex
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...]
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