| /external/v8/src/mips/ |
| disasm-mips.cc | 849 case ADDIU:
850 Format(instr, "addiu 'rt, 'rs, 'imm16s");
|
| code-stubs-mips.cc | [all...] |
| assembler-mips.h | 715 void addiu(Register rd, Register rs, int32_t j);
[all...] |
| assembler-mips.cc | 238 // addiu(sp, sp, 4) aka Pop() operation or part of Pop(r)
240 const Instr kPopInstruction = ADDIU | (kRegister_sp_Code << kRsShift)
242 // addiu(sp, sp, -4) part of Push(r) operation as pre-decrement of sp.
243 const Instr kPushInstruction = ADDIU | (kRegister_sp_Code << kRsShift)
639 return ((instr & kOpcodeMask) == ADDIU);
1204 void Assembler::addiu(Register rd, Register rs, int32_t j) { function in class:v8::Assembler
[all...] |
| /external/webkit/Source/JavaScriptCore/assembler/ |
| MIPSAssembler.h | 253 addiu(dest, MIPSRegisters::zero, imm);
268 void addiu(RegisterID rt, RegisterID rs, int imm) function in class:JSC::MIPSAssembler
|
| /external/valgrind/main/none/tests/mips32/ |
| MIPS32int.stdout.exp | 24 ADDIU
25 addiu $t0, $t1, 0 :: rt 0x00000000 rs 0x00000000, imm 0x00000000
26 addiu $t0, $t1, 1 :: rt 0x00000001 rs 0x00000000, imm 0x00000001
27 addiu $t0, $t1, 1 :: rt 0x00000002 rs 0x00000001, imm 0x00000000
28 addiu $t0, $t1, 1 :: rt 0x00000002 rs 0x00000001, imm 0x00000001
29 addiu $t0, $t1, -1 :: rt 0xffffffff rs 0x00000000, imm 0xffffffff
30 addiu $t0, $t1, -1 :: rt 0x00000000 rs 0x00000001, imm 0xffffffff
31 addiu $t0, $t1, 0 :: rt 0x80000000 rs 0x80000000, imm 0x00000000
32 addiu $t0, $t1, 0 :: rt 0xffffffff rs 0xffffffff, imm 0x00000000
33 addiu $t0, $t1, 0 :: rt 0x80000000 rs 0x80000000, imm 0x0000000
[all...] |
| /external/robolectric/lib/main/ |
| sqlite-jdbc-3.7.2.jar | |
