| /dalvik/vm/mterp/x86/ |
| OP_INVOKE_OBJECT_INIT_RANGE.S | 17 jnz .L${opcode}_setFinal # yes, go
18 .L${opcode}_finish:
22 jnz .L${opcode}_debugger # Yes - skip optimization
29 .L${opcode}_setFinal:
37 jmp .L${opcode}_finish
46 .L${opcode}_debugger:
|
| OP_NEW_INSTANCE.S | 25 je .L${opcode}_resolve # no, go do it
26 .L${opcode}_resolved: # on entry, ecx<- class
28 jne .L${opcode}_needinit
29 .L${opcode}_initialized: # on entry, ecx<- class
43 jne .L${opcode}_jitCheck
45 .L${opcode}_end:
58 .L${opcode}_jitCheck:
60 jne .L${opcode}_end # yes, finish
80 .L${opcode}_needinit:
86 jne .L${opcode}_initialized # success, continu
[all...] |
| bindiv.S | 16 jne .L${opcode}_continue_div
18 jne .L${opcode}_continue_div
26 .L${opcode}_continue_div:
|
| bindiv2addr.S | 16 jne .L${opcode}_continue_div2addr
18 jne .L${opcode}_continue_div2addr
26 .L${opcode}_continue_div2addr:
|
| bindivLit16.S | 17 jne .L${opcode}_continue_div
19 jne .L${opcode}_continue_div
27 .L${opcode}_continue_div:
|
| OP_INSTANCE_OF.S | 22 je .L${opcode}_store # null obj, not instance, store it
28 je .L${opcode}_resolve # not resolved, do it now
29 .L${opcode}_resolved: # eax<- obj->clazz, ecx<- resolved class
31 je .L${opcode}_trivial # yes, trivial finish
41 # fall through to ${opcode}_store
47 .L${opcode}_store:
59 .L${opcode}_trivial:
74 .L${opcode}_resolve:
93 jmp .L${opcode}_resolved
|
| /external/webkit/Source/JavaScriptCore/bytecompiler/ |
| Label.h | 58 int bind(int opcode, int offset) const
61 m_unresolvedJumps.append(std::make_pair(opcode, offset));
64 return m_location - opcode;
|
| /dalvik/dexgen/src/com/android/dexgen/rop/code/ |
| PlainInsn.java | 34 * @param opcode {@code non-null;} the opcode
39 public PlainInsn(Rop opcode, SourcePosition position,
41 super(opcode, position, result, sources);
43 switch (opcode.getBranchingness()) {
50 if (result != null && opcode.getBranchingness() != Rop.BRANCH_NONE) {
60 * @param opcode {@code non-null;} the opcode
65 public PlainInsn(Rop opcode, SourcePosition position, RegisterSpec result,
67 this(opcode, position, result, RegisterSpecList.make(source))
[all...] |
| CstInsn.java | 32 * @param opcode {@code non-null;} the opcode
38 public CstInsn(Rop opcode, SourcePosition position, RegisterSpec result,
40 super(opcode, position, result, sources);
|
| /dalvik/vm/mterp/mips/ |
| unflopWider.S | 23 .L${opcode}_set_vreg:
28 .L${opcode}_set_vreg:
31 GET_INST_OPCODE(t0) # extract opcode from rINST
|
| unopNarrower.S | 9 * long-to-float opcode.
27 .L${opcode}_set_vreg:
32 .L${opcode}_set_vreg_f:
35 GET_INST_OPCODE(t0) # extract opcode from rINST
|
| OP_DOUBLE_TO_INT.S | 24 bgez t0, .L${opcode}_set_vreg # nonzero == yes
34 blez t0, .L${opcode}_set_vreg # nonzero == yes
44 bnez t0, .L${opcode}_set_vreg # return zero for NaN
49 b .L${opcode}_set_vreg
55 bc1t .L${opcode}_set_vreg_f
61 bc1t .L${opcode}_set_vreg_f
66 bc1t .L${opcode}_set_vreg_f
69 b .L${opcode}_set_vreg_f
|
| /dalvik/dx/src/com/android/dx/io/instructions/ |
| OneRegisterDecodedInstruction.java | 31 public OneRegisterDecodedInstruction(InstructionCodec format, int opcode,
34 super(format, opcode, index, indexType, target, literal);
|
| RegisterRangeDecodedInstruction.java | 35 public RegisterRangeDecodedInstruction(InstructionCodec format, int opcode,
38 super(format, opcode, index, indexType, target, literal);
|
| TwoRegisterDecodedInstruction.java | 34 public TwoRegisterDecodedInstruction(InstructionCodec format, int opcode,
37 super(format, opcode, index, indexType, target, literal);
|
| /dalvik/dx/src/com/android/dx/rop/code/ |
| CstInsn.java | 32 * @param opcode {@code non-null;} the opcode
38 public CstInsn(Rop opcode, SourcePosition position, RegisterSpec result,
40 super(opcode, position, result, sources);
|
| /dalvik/vm/compiler/codegen/arm/FP/ |
| ThumbVFP.cpp | 68 TemplateOpcode opcode; local
74 switch (mir->dalvikInsn.opcode) {
77 opcode = TEMPLATE_ADD_FLOAT_VFP;
81 opcode = TEMPLATE_SUB_FLOAT_VFP;
85 opcode = TEMPLATE_DIV_FLOAT_VFP;
89 opcode = TEMPLATE_MUL_FLOAT_VFP;
102 genDispatchToHandler(cUnit, opcode);
114 TemplateOpcode opcode; local
116 switch (mir->dalvikInsn.opcode) {
119 opcode = TEMPLATE_ADD_DOUBLE_VFP
156 Opcode opcode = mir->dalvikInsn.opcode; local
[all...] |
| /dalvik/vm/compiler/codegen/arm/ |
| GlobalOptimizations.cpp | 34 if (thisLIR->opcode == kThumbBUncond) {
54 if (!isPseudoOpcode(nextLIR->opcode) ||
|
| /dalvik/vm/compiler/template/mips/ |
| TEMPLATE_DOUBLE_TO_INT_VFP.S | 23 bgez t0, .L${opcode}_set_vreg # nonzero == yes
33 blez t0, .L${opcode}_set_vreg # nonzero == yes
43 bnez t0, .L${opcode}_set_vreg # return zero for NaN
48 b .L${opcode}_set_vreg
54 bc1t .L${opcode}_set_vreg_f
60 bc1t .L${opcode}_set_vreg_f
65 bc1t .L${opcode}_set_vreg_f
68 b .L${opcode}_set_vreg_f
|
| /dalvik/vm/mterp/c/ |
| OP_MOVE.cpp | 1 HANDLE_OPCODE($opcode /*vA, vB*/)
|
| OP_MOVE_16.cpp | 1 HANDLE_OPCODE($opcode /*vAAAA, vBBBB*/)
|
| OP_MOVE_FROM16.cpp | 1 HANDLE_OPCODE($opcode /*vAA, vBBBB*/)
|
| /external/dexmaker/src/dx/java/com/android/dx/io/instructions/ |
| OneRegisterDecodedInstruction.java | 31 public OneRegisterDecodedInstruction(InstructionCodec format, int opcode,
34 super(format, opcode, index, indexType, target, literal);
|
| RegisterRangeDecodedInstruction.java | 35 public RegisterRangeDecodedInstruction(InstructionCodec format, int opcode,
38 super(format, opcode, index, indexType, target, literal);
|
| TwoRegisterDecodedInstruction.java | 34 public TwoRegisterDecodedInstruction(InstructionCodec format, int opcode,
37 super(format, opcode, index, indexType, target, literal);
|
