| /external/valgrind/main/none/tests/mips32/ |
| MIPS32int.stdout.exp | [all...] |
| /external/libvpx/libvpx/vp8/common/ppc/ |
| loopfilter_filters_altivec.asm | 679 ori r12, r12, 0xc000
772 ori r12, r12, 0xffff
906 ori r12, r12, 0xffff
934 ori r12, r12, 0xffff
1018 ori r12, r12, 0xc000
1045 ori r12, r12, 0xc000
1156 ori r12, r12, 0xc000
[all...] |
| filter_altivec.asm | 200 ori r12, r12, 0xffc0
391 ori r12, r12, 0xffc0
563 ori r12, r12, 0xffc0
772 ori r12, r12, 0xf000
|
| /external/jmonkeyengine/engine/src/test/jme3test/bullet/ |
| TestWalkingChar.java | 186 private void addBrick(Vector3f ori) {
189 reBoxg.setLocalTranslation(ori);
|
| /external/webkit/Source/JavaScriptCore/assembler/ |
| MIPSAssembler.h | 255 ori(dest, MIPSRegisters::zero, imm);
259 ori(dest, dest, imm);
341 void ori(RegisterID rt, RegisterID rs, int imm) function in class:JSC::MIPSAssembler
774 ASSERT((*insn & 0xfc000000) == 0x34000000); // ori
807 ASSERT((*insn & 0xfc000000) == 0x34000000); // ori
843 /* ori */
855 /* ori */
894 ori $25, $25, target & 0xffff
926 /* ori */
951 /* ori $25, $25, to & 0xffff *
[all...] |
| MacroAssemblerMIPS.h | 306 m_assembler.ori(dest, dest, imm.m_value);
559 ori immTemp, immTemp, address.offset & 0xffff
571 m_assembler.ori(immTempRegister, immTempRegister, address.offset);
599 ori addrTemp, addrTemp, address.offset & 0xffff
664 ori addrTemp, addrTemp, address.offset & 0xffff
850 m_assembler.ori(dest, dest, imm.m_value);
[all...] |
| /external/v8/test/cctest/ |
| test-assembler-mips.cc | 136 // Test lui, ori, and addiu, used in the li pseudo-instruction.
139 __ ori(t0, zero_reg, 0);
141 __ ori(t0, t0, 0);
142 __ ori(t0, t0, 0x0f0f);
143 __ ori(t0, t0, 0xf0f0);
212 __ ori(v0, v0, 0x8a00); // 0x00009a30
518 __ ori(t5, t5, 0x3333);
[all...] |
| /external/v8/src/mips/ |
| disasm-mips.cc | 861 case ORI:
862 Format(instr, "ori 'rt, 'rs, 'imm16x");
|
| assembler-mips.cc | 182 // specially coded on MIPS means that it is a lui/ori instruction, and that is
574 return opcode == ORI;
1257 void Assembler::ori(Register rt, Register rs, int32_t j) { function in class:v8::Assembler
[all...] |
| assembler-mips.h | 577 // has already deserialized the lui/ori instructions etc.
598 // Here we are patching the address in the LUI/ORI instruction pair.
609 // the instruction that follows LUI/ORI instruction pair. Now, with new jump
611 // follows LUI/ORI pair is substituted with J/JAL, this constant equals
612 // to 3 instructions (LUI+ORI+J/JAL/JR/JALR).
724 void ori(Register rd, Register rs, int32_t j);
[all...] |
| macro-assembler-mips.cc | 666 ori(rd, rs, rt.imm32_);
781 ori(rd, zero_reg, j.imm32_);
786 ori(rd, rd, (j.imm32_ & kImm16Mask));
795 ori(rd, rd, (j.imm32_ & kImm16Mask));
[all...] |
| code-stubs-mips.cc | [all...] |
| /external/jpeg/ |
| mips_idct_le.S | 77 #ori $at, %lo(mips_idct_coefs)
325 ori $s8, $s8, 0x8080
|
| /external/valgrind/main/none/tests/ppc32/ |
| jm-int.stdout.exp | [all...] |
| /external/openssl/crypto/aes/asm/ |
| aes-ppc.pl | 632 ori $mask80,$mask80,0x8080
634 ori $mask1b,$mask1b,0x1b1b
1066 ori $mask80,$mask80,0x8080
1068 ori $mask1b,$mask1b,0x1b1b
[all...] |
| /external/openssl/crypto/sha/asm/ |
| sha512-mips.pl | 138 ori $tmp0,$zero,0xFF
|
| /external/valgrind/main/none/tests/ppc64/ |
| jm-int.stdout.exp | [all...] |
