| /dalvik/vm/mterp/x86/ |
| OP_IGET.S | 13 movl rSELF,%ecx
26 movl rSELF,rIBASE
|
| OP_IGET_WIDE.S | 11 movl rSELF,%ecx
24 movl rSELF,rIBASE
|
| OP_INSTANCE_OF.S | 18 movl rSELF,%ecx
76 movl rSELF,%ecx
|
| OP_IPUT.S | 14 movl rSELF,%ecx
27 movl rSELF,rIBASE
|
| OP_IPUT_WIDE.S | 11 movl rSELF,%ecx
24 movl rSELF,rIBASE
|
| OP_NEW_ARRAY.S | 12 movl rSELF,%ecx
32 movl rSELF,%ecx
|
| OP_SGET_WIDE.S | 10 movl rSELF,%ecx
36 movl rSELF,%ecx
|
| OP_SPUT_WIDE.S | 11 movl rSELF,%ecx
37 movl rSELF,%ecx
|
| OP_APUT_OBJECT.S | 40 movl rSELF,%eax
|
| OP_INVOKE_SUPER.S | 11 movl rSELF,rINST
|
| /dalvik/vm/compiler/codegen/mips/ |
| CodegenFactory.cpp | 54 loadWordDisp(cUnit, rSELF, offsetof(Thread, interpSave.retval), reg1);
87 loadBaseDispWide(cUnit, NULL, rSELF, offsetof(Thread, interpSave.retval),
121 loadWordDisp(cUnit, rSELF, offsetof(Thread, interpSave.retval), rlSrc.lowReg);
161 storeBaseDisp(cUnit, rSELF, offsetof(Thread, interpSave.retval),
189 loadBaseDispWide(cUnit, NULL, rSELF, offsetof(Thread, interpSave.retval),
239 storeBaseDispWide(cUnit, rSELF, offsetof(Thread, interpSave.retval),
|
| CodegenDriver.cpp | 35 loadWordDisp(cUnit, rSELF, offsetof(Thread, cardTable),
[all...] |
| MipsLIR.h | 32 * s1 (rSELF) is reserved [holds current &Thread]
241 * rPC, rFP, and rSELF are for architecture-independent code to use.
341 #define rSELF r_S2
|
| /dalvik/vm/mterp/mips/ |
| OP_INVOKE_DIRECT.S | 29 lw a3, offThread_method(rSELF) # a3 <- self->method
|
| OP_SPUT_OBJECT.S | 45 lw a2, offThread_cardTable(rSELF) # a2 <- card table base
|
| header.S | 21 s2 rSELF self (Thread) pointer
30 #define rSELF s2
60 #define LOAD_PC_FROM_SELF() lw rPC, offThread_pc(rSELF)
61 #define SAVE_PC_TO_SELF() sw rPC, offThread_pc(rSELF)
62 #define LOAD_FP_FROM_SELF() lw rFP, offThread_curFrame(rSELF)
63 #define SAVE_FP_TO_SELF() sw rFP, offThread_curFrame(rSELF)
148 #define LOAD_rSELF_OFF(rd, off) lw rd, offThread_##off## (rSELF)
|
| OP_APUT_OBJECT.S | 40 lw a2, offThread_cardTable(rSELF)
|
| OP_IPUT_OBJECT.S | 41 lw a2, offThread_cardTable(rSELF) # a2 <- card table base
|
| /dalvik/vm/mterp/armv5te/ |
| OP_INSTANCE_OF.S | 20 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- pDvmDex
74 ldr r0, [rSELF, #offThread_method] @ r0<- self->method
|
| /dalvik/vm/compiler/template/mips/ |
| header.S | 40 s2 rSELF pointer to thread
114 #define rSELF s2
144 #define LOAD_PC_FROM_SELF() lw rPC, offThread_pc(rSELF)
145 #define SAVE_PC_TO_SELF() sw rPC, offThread_pc(rSELF)
146 #define LOAD_FP_FROM_SELF() lw rFP, offThread_curFrame(rSELF)
147 #define SAVE_FP_TO_SELF() sw rFP, offThread_curFrame(rSELF)
218 #define LOAD_rSELF_OFF(rd,off) lw rd, offThread_##off##(rSELF)
|
| TEMPLATE_RESTORE_STATE.S | 4 * a0 - offset from rSELF to the 1st element of the coreRegs save array.
9 add a0, a0, rSELF # pointer to heapArgSpace.coreRegs[0]
|
| TEMPLATE_SAVE_STATE.S | 6 * a0 - offset from rSELF to the beginning of the heapArgSpace record
16 add a0, a0, rSELF # pointer to heapArgSpace
|
| /dalvik/vm/compiler/codegen/mips/Mips32/ |
| Gen.cpp | 257 storeWordDisp(cUnit, rSELF, offset, reg0);
270 storeWordDisp(cUnit, rSELF, offset + LOWORD_OFFSET, reglo);
277 storeWordDisp(cUnit, rSELF, offset + HIWORD_OFFSET, reghi);
300 newLIR3(cUnit, kMipsSw, reg0, offset, rSELF);
|
| /dalvik/vm/compiler/template/out/ |
| CompilerTemplateAsm-mips.S | 47 s2 rSELF pointer to thread
121 #define rSELF s2
151 #define LOAD_PC_FROM_SELF() lw rPC, offThread_pc(rSELF)
152 #define SAVE_PC_TO_SELF() sw rPC, offThread_pc(rSELF)
153 #define LOAD_FP_FROM_SELF() lw rFP, offThread_curFrame(rSELF)
154 #define SAVE_FP_TO_SELF() sw rFP, offThread_curFrame(rSELF)
225 #define LOAD_rSELF_OFF(rd,off) lw rd, offThread_##off##(rSELF)
481 # a0=rSELF
482 move a0, rSELF
495 lbu t1, offThread_breakFlags(rSELF) # t1<- breakFlag
[all...] |
| /dalvik/vm/compiler/codegen/arm/ |
| ArmLIR.h | 27 * r6 (rSELF) is reserved [holds current &Thread]
211 * rPC, rFP, and rSELF are for architecture-independent code to use.
222 rSELF = 6,
223 r6SELF = rSELF,
[all...] |
