| /external/openssl/crypto/bn/asm/ |
| bn-mips.S | 642 srl $1,$5,$13
651 srl $3,$6,4*4 # bits
659 srl $9,$4,4*4 # bits
660 srl $8,4*4 # q=0xffffffff
667 srl $1,$5,4*4 # bits
692 srl $9,$4,4*4 # bits
693 srl $8,4*4 # q=0xffffffff
700 srl $1,$5,4*4 # bits
722 srl $3,$4,$25 # $3 contains remainder if anybody wants it
723 srl $6,$25 # restore $
[all...] |
| sparcv8plus.S | 188 srl %o3,%g0,%o3 ! clruw %o3
290 srl %o3,%g0,%o3 ! clruw %o3
459 srl %o0,%g0,%o0 ! clruw %o0
[all...] |
| /dalvik/vm/compiler/template/mips/ |
| header.S | 210 #define GET_OPA(rd) srl rd, rINST, 8
216 #define GET_OPB(rd) srl rd, rINST, 12
249 srl AT, roff, rshift; \
|
| /dalvik/vm/mterp/mips/ |
| header.S | 140 #define GET_OPA(rd) srl rd, rINST, 8
146 #define GET_OPB(rd) srl rd, rINST, 12
178 srl AT, roff, rshift; \
|
| /external/openssl/crypto/aes/asm/ |
| aes-mips.pl | 839 srl $i0,$rk3,16
840 srl $i1,$rk3,8
844 srl $i3,$rk3,24
894 srl $i0,$rk5,16
895 srl $i1,$rk5,8
899 srl $i3,$rk5,24
953 srl $i0,$rk7,16
954 srl $i1,$rk7,8
958 srl $i3,$rk7,24
995 srl $i0,$rk3,2
[all...] |
| aes-s390x.pl | 297 srl $s0,`24-3`
306 srl $s1,`24-3`
327 srl $s2,`24-3`
345 srl $s3,`24-3`
367 srl $s0,`24-3`
376 srl $s1,`24-3`
406 srl $s2,`24-3`
428 srl $s3,`24-3`
623 srl $s0,`24-3`
632 srl $s1,`24-3
[all...] |
| /dalvik/vm/mterp/out/ |
| InterpAsm-mips.S | 147 #define GET_OPA(rd) srl rd, rINST, 8
153 #define GET_OPB(rd) srl rd, rINST, 12
185 srl AT, roff, rshift; \
[all...] |
| /bionic/libc/arch-mips/include/machine/ |
| asm.h | 176 #define PTR_SRL srl
|
| /development/ndk/platforms/android-9/arch-mips/include/machine/ |
| asm.h | 176 #define PTR_SRL srl
|
| /external/qemu/target-mips/ |
| helper.c | 291 } lui, lw, srl; member in struct:__anon13956
297 {0x34, 0x001ad182, 0xffffffff} /* 0x001ad182 : srl k0,k0,0x6 */
303 {0x34, 0x001ad142, 0xffffffff} /* 0x001ad182 : srl k0,k0,0x5 */
313 srl_ins = ldl_phys(ebase + handlers[i].srl.off);
316 ((srl_ins & handlers[i].srl.mask) == handlers[i].srl.op))
|
| /external/v8/src/mips/ |
| debug-mips.cc | 168 __ srl(reg, reg, kSmiTagSize);
|
| stub-cache-mips.cc | 226 __ srl(scratch, scratch, kHeapObjectTagSize);
243 __ srl(at, name, kHeapObjectTagSize);
[all...] |
| macro-assembler-mips.cc | 435 srl(at, reg0, 12);
443 srl(at, reg0, 4);
453 srl(at, reg0, 16);
761 srl(rd, rs, 0);
763 srl(at, rs, rt.imm32_);
944 srl(rt, rt, shift_right);
963 srl(at, at, 32 - size);
[all...] |
| disasm-mips.cc | 635 case SRL:
637 Format(instr, "srl 'rd, 'rt, 'sa");
|
| code-stubs-mips.cc | 511 __ srl(source_, source_, 32 - HeapNumber::kMantissaBitsInTopWord);
[all...] |
| assembler-mips.h | 734 void srl(Register rd, Register rt, uint16_t sa);
[all...] |
| /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/machine/ |
| asm.h | 176 #define PTR_SRL srl
|
| /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/machine/ |
| asm.h | 176 #define PTR_SRL srl
|
| /external/openssl/crypto/sha/asm/ |
| sha512-mips.pl | 84 $SRL="dsrl"; # shift right logical
98 $SRL="srl"; # shift right logical
127 srl $tmp0,@X[0],24 # byte swap($i)
128 srl $tmp1,@X[0],8
159 $SRL $h,$e,@Sigma1[0]
163 $SRL $tmp0,$e,@Sigma1[1]
167 $SRL $tmp0,$e,@Sigma1[2]
174 $SRL $h,$a,@Sigma0[0]
179 $SRL $tmp0,$a,@Sigma0[1
[all...] |
| /external/openssl/crypto/modes/asm/ |
| ghash-sparcv9.pl | 191 srl $Zlo,8,$xi1
|
| /external/jpeg/ |
| config.guess | 71 srl \$1,8,\$2
523 srl \$1,8,\$2
|
| /external/qemu/distrib/jpeg-6b/ |
| config.guess | 71 srl \$1,8,\$2
523 srl \$1,8,\$2
|
| /external/valgrind/main/none/tests/mips32/ |
| MIPS32int.stdout.exp | [all...] |
| /dalvik/vm/compiler/template/out/ |
| CompilerTemplateAsm-mips.S | 217 #define GET_OPA(rd) srl rd, rINST, 8
223 #define GET_OPB(rd) srl rd, rINST, 12
256 srl AT, roff, rshift; \
[all...] |
| /external/webkit/Source/JavaScriptCore/assembler/ |
| MIPSAssembler.h | 401 void srl(RegisterID rd, RegisterID rt, int shamt) function in class:JSC::MIPSAssembler
|
