| /external/llvm/test/CodeGen/X86/ |
| sincos.ll | 17 ; SIN: {{^[ \t]*fsin$}}
19 ; SIN-NOT: fsin
22 ; SAFE-NOT: fsin
29 ; SIN: {{^[ \t]*fsin$}}
31 ; SIN-NOT: fsin
34 ; SAFE-NOT: fsin
41 ; SIN: {{^[ \t]*fsin$}}
43 ; SIN-NOT: fsin
78 ; SIN-NOT: fsin
|
| /external/quake/quake/src/QW/qwfwd/ |
| qwfwd.c | 170 struct sockaddr_in fsin;
local
212 alen = sizeof(fsin);
213 i1 = recvfrom(s, buffer, 4096, 0, (struct sockaddr *) &fsin, &alen);
216 if (memcmp(&p->sin.sin_addr, &fsin.sin_addr, sizeof(p->sin.sin_addr)) == 0 &&
217 memcmp(&p->sin.sin_port, &fsin.sin_port, sizeof(p->sin.sin_port)) == 0)
224 printf("peer %s:%d added", inet_ntoa(fsin.sin_addr), (int)ntohs(fsin.sin_port));
226 p->sin = fsin;
|
| /external/qemu/target-i386/ |
| helper.h | 185 DEF_HELPER_0(fsin, void)
|
| /external/llvm/docs/CommandGuide/ |
| llc.rst | 105 would otherwise not be usable (such as ``fsin`` on X86).
|
| /ndk/sources/host-tools/nawk-20071023/ |
| awk.h | 123 #define FSIN 9
|
| lex.c | 79 { "sin", FSIN, BLTIN },
|
| /external/jmonkeyengine/engine/src/core/com/jme3/math/ |
| Matrix3f.java | 740 float fSin = FastMath.sin(angle);
748 float fXSin = axis.x * fSin;
749 float fYSin = axis.y * fSin;
750 float fZSin = axis.z * fSin;
[all...] |
| Matrix4f.java | 927 float fSin = FastMath.sin(angle);
935 float fXSin = axis.x * fSin;
936 float fYSin = axis.y * fSin;
937 float fZSin = axis.z * fSin;
[all...] |
| /external/libvpx/libvpx/examples/includes/geshi/geshi/ |
| asm.php | 89 'fsetpm','fcos','fldenvd','fnsaved','fnstenvd','fprem1','frstord','fsaved','fsin','fsincos',
|
| /external/llvm/include/llvm/Target/ |
| TargetOptions.h | 89 /// use of X86 instructions like FSIN and FCOS instead of libcalls.
|
| TargetSelectionDAG.td | 376 def fsin : SDNode<"ISD::FSIN" , SDTFPUnaryOp>;
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 141 case ISD::FSIN: return "fsin";
|
| LegalizeDAG.cpp | [all...] |
| LegalizeFloatTypes.cpp | 91 case ISD::FSIN: R = SoftenFloatRes_FSIN(N); break;
[all...] |
| LegalizeVectorOps.cpp | 231 case ISD::FSIN:
|
| LegalizeVectorTypes.cpp | 86 case ISD::FSIN:
542 case ISD::FSIN:
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 453 /// FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
457 FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
461 /// FSINCOS - Compute both fsin and fcos as a single operation.
[all...] |
| /external/llvm/lib/CodeGen/ |
| BasicTargetTransformInfo.cpp | 406 case Intrinsic::sin: ISD = ISD::FSIN; break;
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/genext2fs/ |
| genext2fs.c | 2524 char * fsin = 0; local
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrFPStack.td | 268 defm SIN : FPUnary<fsin, 0xFE, "fsin">;
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 757 setOperationAction(ISD::FSIN , MVT::f64, Expand);
762 setOperationAction(ISD::FSIN , MVT::f32, Expand);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 200 setOperationAction(ISD::FSIN, MVT::f32, Expand);
201 setOperationAction(ISD::FSIN, MVT::f64, Expand);
221 setOperationAction(ISD::FSIN, MVT::f128, Expand);
[all...] |
| /external/v8/src/ia32/ |
| assembler-ia32.h | 932 void fsin();
[all...] |
| /external/valgrind/main/VEX/useful/ |
| hd_fpu.c | 1085 case 0xFE: /* FSIN */
[all...] |
