| /external/valgrind/main/none/tests/mips32/ |
| vfp.stdout.exp-mips32 | 0 LDC1
2 ldc1 $f0, 0($t1) :: ft 0x4095a26666666666
3 ldc1 $f0, 8($t1) :: ft 0xbff000000
4 ldc1 $f0, 16($t1) :: ft 0x3ff000000
5 ldc1 $f0, 24($t1) :: ft 0x252a2e2b262d2d2a
6 ldc1 $f0, 32($t1) :: ft 0xffffffffffffffff
7 ldc1 $f0, 40($t1) :: ft 0x41d26580b487e5c9
8 ldc1 $f0, 48($t1) :: ft 0x42026580b750e388
9 ldc1 $f0, 56($t1) :: ft 0x3e45798ee2308c3a
10 ldc1 $f0, 64($t1) :: ft 0x3fbf9add3746f65
[all...] |
| vfp.c | 46 // ldc1 $f0, 0($t1)
130 "ldc1 $f0, "#offset"($t1)\n\t" \
150 "ldc1 $f0, "#offset"($t1)\n\t" \
229 printf("LDC1\n");
230 TESTINSN5LOAD("ldc1 $f0, 0($t1)", 0, 0, f0);
231 TESTINSN5LOAD("ldc1 $f0, 8($t1)", 0, 8, f0);
232 TESTINSN5LOAD("ldc1 $f0, 16($t1)", 0, 16, f0);
233 TESTINSN5LOAD("ldc1 $f0, 24($t1)", 0, 24, f0);
234 TESTINSN5LOAD("ldc1 $f0, 32($t1)", 0, 32, f0);
235 TESTINSN5LOAD("ldc1 $f0, 40($t1)", 0, 40, f0)
[all...] |
| vfp.stdout.exp | 0 LDC1
2 ldc1 $f0, 0($t1) :: ft 0x4095a26666666666
3 ldc1 $f0, 8($t1) :: ft 0xbff000000
4 ldc1 $f0, 16($t1) :: ft 0x3ff000000
5 ldc1 $f0, 24($t1) :: ft 0x252a2e2b262d2d2a
6 ldc1 $f0, 32($t1) :: ft 0xffffffffffffffff
7 ldc1 $f0, 40($t1) :: ft 0x41d26580b487e5c9
8 ldc1 $f0, 48($t1) :: ft 0x42026580b750e388
9 ldc1 $f0, 56($t1) :: ft 0x3e45798ee2308c3a
10 ldc1 $f0, 64($t1) :: ft 0x3fbf9add3746f65
[all...] |
| vfp.stdout.exp-BE | 0 LDC1
2 ldc1 $f0, 0($t1) :: ft 0x666666664095a266
3 ldc1 $f0, 8($t1) :: ft 0x0bff00000
4 ldc1 $f0, 16($t1) :: ft 0x03ff00000
5 ldc1 $f0, 24($t1) :: ft 0x262d2d2a252a2e2b
6 ldc1 $f0, 32($t1) :: ft 0xffffffffffffffff
7 ldc1 $f0, 40($t1) :: ft 0xb487e5c941d26580
8 ldc1 $f0, 48($t1) :: ft 0xb750e38842026580
9 ldc1 $f0, 56($t1) :: ft 0xe2308c3a3e45798e
10 ldc1 $f0, 64($t1) :: ft 0x3746f65f3fbf9ad
[all...] |
| MoveIns.c | 50 "ldc1 $" #FS ", "#offset"($t0)\n\t" \
126 "ldc1 $" #FS ", "#offset"($t0)\n\t" \
195 "ldc1 $" #FS ", "#offset"($t0)\n\t" \
237 "ldc1 $" #FS ", "#offset"($t0)\n\t" \
|
| /external/llvm/test/CodeGen/Mips/ |
| mips64-f128-call.ll | 17 ; CHECK: ldc1 $f13, 8(${{[0-9]+}})
18 ; CHECK: ldc1 $f12, 0(${{[0-9]+}})
34 ; CHECK: ldc1 $f0, 0($[[R1]])
35 ; CHECK: ldc1 $f2, 8($[[R1]])
|
| o32_cc.ll | 7 ; CHECK: ldc1 $f12, %lo
8 ; CHECK: ldc1 $f14, %lo
30 ; CHECK: ldc1 $f14, %lo
40 ; CHECK: ldc1 $f12, %lo
66 ; CHECK: ldc1 $f12, %lo
77 ; CHECK: ldc1 $f12, %lo
180 ; CHECK: ldc1 $f12, %lo
283 ; CHECK: ldc1 $f12, %lo
296 ; CHECK: ldc1 $f12, %lo
|
| mips64fpldst.ll | 25 ; CHECK-N64: ldc1 $f{{[0-9]+}}, 0($[[R0]])
28 ; CHECK-N32: ldc1 $f{{[0-9]+}}, 0($[[R0]])
|
| o32_cc_vararg.ll | 65 ; CHECK: ldc1 $f0, 0($[[R3]])
112 ; CHECK: ldc1 $f0, 32($sp)
168 ; CHECK: ldc1 $f0, 0($[[R3]])
215 ; CHECK: ldc1 $f0, 48($sp)
269 ; CHECK: ldc1 $f0, 0($[[R3]])
|
| return-vector.ll | 84 ; CHECK: ldc1 $[[R0:[a-z0-9]+]], 56($sp)
85 ; CHECK: ldc1 $[[R1:[a-z0-9]+]], 48($sp)
86 ; CHECK: ldc1 $[[R3:[a-z0-9]+]], 40($sp)
87 ; CHECK: ldc1 $[[R4:[a-z0-9]+]], 32($sp)
146 ; CHECK-NOT: ldc1
|
| o32_cc_byval.ll | 50 ; CHECK: ldc1 $f[[F0:[0-9]+]], 72($sp)
|
| /external/v8/test/cctest/ |
| test-assembler-mips.cc | 290 __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, a)) );
291 __ ldc1(f6, MemOperand(a0, OFFSET_OF(T, b)) );
363 __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, a)) );
364 __ ldc1(f6, MemOperand(a0, OFFSET_OF(T, b)) );
425 __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, a)) );
426 __ ldc1(f6, MemOperand(a0, OFFSET_OF(T, b)) );
572 __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, a)) );
573 __ ldc1(f6, MemOperand(a0, OFFSET_OF(T, b)) );
786 __ ldc1(f0, MemOperand(a0, OFFSET_OF(T, a)));
1178 __ ldc1(f0, MemOperand(a0, OFFSET_OF(T, round_up_in)));
[all...] |
| /external/v8/src/mips/ |
| lithium-gap-resolver-mips.cc | 177 __ ldc1(kLithiumScratchDouble, cgen_->ToMemOperand(source));
286 __ ldc1(cgen_->ToDoubleRegister(destination), source_operand);
302 __ ldc1(kLithiumScratchDouble, source_operand);
|
| constants-mips.cc | 336 case LDC1:
|
| code-stubs-mips.cc | 598 // kValueOffset. On MIPS this workaround is built into ldc1 so there's no
600 __ ldc1(dst, FieldMemOperand(object, HeapNumber::kValueOffset));
795 __ ldc1(double_dst, FieldMemOperand(object, HeapNumber::kValueOffset));
867 __ ldc1(double_scratch, FieldMemOperand(object, HeapNumber::kValueOffset));
[all...] |
| disasm-mips.cc | 910 case LDC1:
911 Format(instr, "ldc1 'ft, 'imm16s('rs)");
|
| /external/llvm/lib/Target/Mips/ |
| MipsJITInfo.cpp | 140 "ldc1 $f12, 48($sp)\n"
141 "ldc1 $f14, 56($sp)\n"
|
| MipsInstrFPU.td | 297 def LDC164_P8 : LW_FT<"ldc1", FGR64, IILoad, mem64, load>, LW_FM<0x35> {
312 def LDC164 : LW_FT<"ldc1", FGR64, IILoad, mem, load>, LW_FM<0x35>;
317 def LDC1 : LW_FT<"ldc1", AFGR64, IILoad, mem, load>, LW_FM<0x35>;
530 def : MipsPat<(f64 (load addrRegImm:$a)), (LDC1 addrRegImm:$a)>;
|
| MipsSEInstrInfo.cpp | 48 (Opc == Mips::LDC1) || (Opc == Mips::LDC164) ||
199 Opc = Mips::LDC1;
|
| /external/webkit/Source/JavaScriptCore/assembler/ |
| MacroAssemblerMIPS.h | [all...] |
| /external/llvm/test/MC/Disassembler/Mips/ |
| mips32.txt | 216 # CHECK: ldc1 $f9, 9158($7)
|
| mips32_le.txt | 216 # CHECK: ldc1 $f9, 9158($7)
|
| mips32r2.txt | 225 # CHECK: ldc1 $f9, 9158($7)
|
| mips32r2_le.txt | 225 # CHECK: ldc1 $f9, 9158($7)
|
| /external/v8/src/ |
| deoptimizer.h | 380 // Prevent gcc from using load-double (mips ldc1) on (possibly)
|
