| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
| armVCM4P10_InterpolateLuma_Align_unsafe_s.S | 26 LDM r0,{r7,r10,r11}
33 LDM r0,{r7,r10,r11}
45 LDM r0,{r7,r10,r11}
57 LDM r0,{r7,r10,r11}
|
| /external/llvm/test/CodeGen/ARM/ |
| 2013-01-21-PR14992.ll | 16 ;EXPECTED: ldm [[BASE:r[0-9]+]]!, {[[REG:r[0-9]+]], {{r[0-9]+}},
17 ;CHECK-NOT: ldm [[BASE:r[0-9]+]]!, {[[REG:r[0-9]+]], [[REG]],
|
| 2010-10-25-ifcvt-ldm.ll | 3 ; LDM instruction, was causing an assertion failure because the microop count
|
| 2012-10-18-PR14099-ByvalFrameAddress.ll | 26 ; CHECK: ldm r0, {r1, r2, r3}
|
| 2012-10-04-AAPCS-byval-align8.ll | 27 ; CHECK: ldm r0, {r2, r3}
50 ; CHECK: ldm r0, {r2, r3}
|
| 2011-11-28-DAGCombineBug.ll | 5 ; combined them into a ldm which causes runtime exception.
16 ; CHECK-NOT: ldm
|
| arm-modifier.ll | 51 ; CHECK: ldm {{lr|r[0-9]+}}, {r{{[0-9]+}}, r{{[0-9]+}}}
56 %1 = call i64 asm sideeffect "ldm ${1:m}, ${0:M}\0A\09", "=r,*m"(i64** @f3_ptr) nounwind
|
| /external/compiler-rt/lib/sanitizer_common/tests/ |
| standalone_malloc_test.cc | 51 fprintf(stderr, " T[%ld] total_malloced: %ldM in use %ldM max %ldM\n",
|
| /dalvik/vm/compiler/template/armv5te/ |
| TEMPLATE_CMP_LONG.S | 5 * We load the full values with LDM, but in practice many values could
7 * faster or slower by splitting the LDM into a pair of LDRs.
|
| /external/llvm/test/MC/ARM/ |
| thumb-diagnostics.s | 41 @ Invalid writeback and register lists for LDM
42 ldm r2!, {r5, r8}
43 ldm r2, {r5, r7}
44 ldm r2!, {r2, r3, r4}
46 @ CHECK-ERRORS: ldm r2!, {r5, r8}
49 @ CHECK-ERRORS: ldm r2, {r5, r7}
52 @ CHECK-ERRORS: ldm r2!, {r2, r3, r4}
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/ |
| armVCM4P10_InterpolateLuma_Align_unsafe_s.s | 76 LDM pSrc, {x0, x1, x2}
87 LDM pSrc, {x0, x1, x2}
103 LDM pSrc, {x0, x1, x2}
119 LDM pSrc, {x0, x1, x2}
|
| omxVCM4P10_InterpolateLuma_s.s | 229 LDM pArgs, {pSrc, srcStep, pDst, dstStep}
266 LDM pArgs, {pSrc, srcStep, pDst, dstStep}
350 LDM pArgs, {pSrc, srcStep, pDst, dstStep}
387 LDM pArgs, {pSrc, srcStep, pDst, dstStep}
403 LDM pArgs, {pSrc,srcStep,pDst,dstStep} ;// Load arguments
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
| armVCM4P10_InterpolateLuma_Align_unsafe_s.s | 76 LDM pSrc, {x0, x1, x2}
87 LDM pSrc, {x0, x1, x2}
103 LDM pSrc, {x0, x1, x2}
119 LDM pSrc, {x0, x1, x2}
|
| /dalvik/vm/mterp/armv5te/ |
| OP_CMP_LONG.S | 9 * We load the full values with LDM, but in practice many values could
11 * faster or slower by splitting the LDM into a pair of LDRs.
|
| /external/libvpx/libvpx/vp8/common/arm/armv6/ |
| copymem16x16_v6.asm | 141 ;ldm r0, {r4-r5}
169 ;ldm r0, {r4-r7}
|
| copymem8x4_v6.asm | 112 ;ldm r0, {r4-r5}
|
| copymem8x8_v6.asm | 112 ;ldm r0, {r4-r5}
|
| /external/llvm/test/CodeGen/Thumb2/ |
| thumb2-ldm.ll | 18 ; CHECK: ldm
|
| /external/aac/libFDK/src/ |
| fft_rad2.cpp | 124 INT trigstep,i,ldm; local
155 for(ldm=3; ldm<=ldn; ++ldm)
157 INT m=(1<<ldm);
161 trigstep=((trigDataSize << 2)>>ldm);
329 INT trigstep,i,ldm; local
360 for(ldm=3; ldm<=ldn; ++ldm)
[all...] |
| /external/llvm/test/MC/Disassembler/ARM/ |
| invalid-RFEorLDMIA-arm.txt | 10 # A8.6.53 LDM/LDMIA/LDMFD is predicated with Inst{31-28} as cond ==> Not an LDMIA instruction
|
| thumb-tests.txt | 30 # CHECK: ldm r0!, {r1}
152 # CHECK: ldm r5, {r0, r1, r2, r3, r4, r5}
155 # CHECK: ldm r5!, {r0, r1, r2, r3, r4}
|
| /sdk/emulator/qtools/ |
| opcode.cpp | 125 "ldm",
|
| /external/libffi/src/arm/ |
| sysv.S | 124 ldm\cond\dirn sp!, {\regs, lr}
131 ldm\cond\dirn sp!, {\regs, pc}
|
| /system/core/libpixelflinger/codeflinger/ |
| ARMAssemblerProxy.cpp | 236 void ARMAssemblerProxy::LDM(int cc, int dir, int Rn, int W, uint32_t reg_list) {
237 mTarget->LDM(cc, dir, Rn, W, reg_list);
|
| /bionic/libc/arch-arm/include/machine/ |
| cpu-features.h | 146 * value of the pc register, including ldm { ...,pc } or 'add pc, #offset'
|
