| /dalvik/vm/mterp/armv5te/ |
| OP_AGET_BOOLEAN.S | 2 %include "armv5te/OP_AGET.S" { "load":"ldrb", "shift":"0" }
|
| OP_IGET_BOOLEAN.S | 2 @include "armv5te/OP_IGET.S" { "load":"ldrb", "sqnum":"1" }
|
| /external/libvpx/libvpx/vp8/common/arm/neon/ |
| buildintrapredictorsmby_neon.asm | 79 ldrb r3, [r0], r2
80 ldrb r4, [r0], r2
81 ldrb r5, [r0], r2
82 ldrb r6, [r0], r2
89 ldrb r3, [r0], r2
90 ldrb r4, [r0], r2
91 ldrb r5, [r0], r2
92 ldrb r6, [r0], r2
99 ldrb r3, [r0], r2
100 ldrb r4, [r0], r
[all...] |
| /external/libvpx/libvpx/vp8/common/arm/armv6/ |
| copymem16x16_v6.asm | 37 ldrb r4, [r0]
38 ldrb r5, [r0, #1]
39 ldrb r6, [r0, #2]
40 ldrb r7, [r0, #3]
50 ldrb r4, [r0, #4]
51 ldrb r5, [r0, #5]
52 ldrb r6, [r0, #6]
53 ldrb r7, [r0, #7]
62 ldrb r4, [r0, #8]
63 ldrb r5, [r0, #9
[all...] |
| copymem8x4_v6.asm | 36 ldrb r4, [r0]
37 ldrb r5, [r0, #1]
45 ldrb r4, [r0, #2]
46 ldrb r5, [r0, #3]
53 ldrb r4, [r0, #4]
54 ldrb r5, [r0, #5]
59 ldrb r4, [r0, #6]
60 ldrb r5, [r0, #7]
|
| copymem8x8_v6.asm | 36 ldrb r4, [r0]
37 ldrb r5, [r0, #1]
45 ldrb r4, [r0, #2]
46 ldrb r5, [r0, #3]
53 ldrb r4, [r0, #4]
54 ldrb r5, [r0, #5]
59 ldrb r4, [r0, #6]
60 ldrb r5, [r0, #7]
|
| sixtappredict8x4_v6.asm | 53 ldrb r6, [r0, #-5] ; load source data
54 ldrb r7, [r0, #-4]
55 ldrb r8, [r0, #-3]
56 ldrb r9, [r0, #-2]
57 ldrb r10, [r0, #-1]
71 ldrb r6, [r0], #1
74 ldrb r7, [r0], #1
198 ldrb r4, [r0], #1 ; load data
200 ldrb r5, [r0], #1
202 ldrb r6, [r0], #1 ; load dat
[all...] |
| filter_v6.asm | 54 ldrb r8, [r0, #-2] ; load source data
55 ldrb r9, [r0, #-1]
56 ldrb r10, [r0], #2
60 ldrb r11, [r0, #-1]
65 ldrb r9, [r0]
73 ldrb r10, [r0, #1]
75 ldrb r11, [r0, #2]
144 ldrb r8, [r0, #-2] ; load source data
145 ldrb r9, [r0, #-1]
146 ldrb r10, [r0], #
[all...] |
| intra4x4_predict_v6.asm | 53 ldrb r4, [r1], r2 ; Left[0]
55 ldrb r5, [r1], r2 ; Left[1]
56 ldrb r6, [r1], r2 ; Left[2]
58 ldrb r7, [r1] ; Left[3]
83 ldrb r9, [sp, #48] ; top_left
84 ldrb r4, [r1], r2 ; Left[0]
85 ldrb r5, [r1], r2 ; Left[1]
86 ldrb r6, [r1], r2 ; Left[2]
87 ldrb r7, [r1] ; Left[3]
143 ldrb r9, [sp, #48] ; top_lef
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| unaligned_load_store.ll | 11 ; EXPANDED: ldrb [[R2:r[0-9]+]]
12 ; EXPANDED: ldrb [[R3:r[0-9]+]]
13 ; EXPANDED: ldrb [[R12:r[0-9]+]]
14 ; EXPANDED: ldrb [[R1:r[0-9]+]]
51 ; EXPANDED: ldrb
66 ; EXPANDED: ldrb
70 ; UNALIGNED-NOT: ldrb
|
| atomic-load-store.ll | 36 ; ARM: ldrb
39 ; THUMBTWO: ldrb
42 ; THUMBONE: ldrb
|
| fast-isel-fold.ll | 9 ; ARM: ldrb
12 ; THUMB: ldrb
36 ; ARM: ldrb
39 ; THUMB: ldrb
|
| fast-isel.ll | 124 ; THUMB: ldrb
130 ; ARM: ldrb
261 ; ARM-STRICT-ALIGN: ldrb
262 ; ARM-STRICT-ALIGN: ldrb
265 ; THUMB-STRICT-ALIGN: ldrb
266 ; THUMB-STRICT-ALIGN: ldrb
293 ; ARM-STRICT-ALIGN: ldrb
294 ; ARM-STRICT-ALIGN: ldrb
295 ; ARM-STRICT-ALIGN: ldrb
296 ; ARM-STRICT-ALIGN: ldrb
[all...] |
| /external/llvm/test/CodeGen/Thumb2/ |
| thumb2-ldrb.ll | 6 ; CHECK: ldrb r0, [r0]
14 ; CHECK: ldrb r0, [r0, #-1]
24 ; CHECK: ldrb r0, [r0, r1]
34 ; CHECK: ldrb r0, [r0, #-128]
44 ; CHECK: ldrb r0, [r0, r1]
54 ; CHECK: ldrb.w r0, [r0, r1, lsl #2]
66 ; CHECK: ldrb r0, [r0, r1]
|
| /external/openssl/crypto/aes/asm/ |
| aes-armv4.S | 123 ldrb r0,[r12,#3] @ load input data in endian-neutral
124 ldrb r4,[r12,#2] @ manner...
125 ldrb r5,[r12,#1]
126 ldrb r6,[r12,#0]
128 ldrb r1,[r12,#7]
130 ldrb r4,[r12,#6]
132 ldrb r5,[r12,#5]
133 ldrb r6,[r12,#4]
135 ldrb r2,[r12,#11]
137 ldrb r4,[r12,#10
[all...] |
| aes-armv4.pl | 176 ldrb $s0,[$rounds,#3] @ load input data in endian-neutral
177 ldrb $t1,[$rounds,#2] @ manner...
178 ldrb $t2,[$rounds,#1]
179 ldrb $t3,[$rounds,#0]
181 ldrb $s1,[$rounds,#7]
183 ldrb $t1,[$rounds,#6]
185 ldrb $t2,[$rounds,#5]
186 ldrb $t3,[$rounds,#4]
188 ldrb $s2,[$rounds,#11]
190 ldrb $t1,[$rounds,#10
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| bool-loads.ll | 10 ; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, #:lo12:var]
22 ; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, #:lo12:var]
37 ; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, #:lo12:var]
51 ; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, #:lo12:var]
|
| /external/llvm/test/CodeGen/Thumb/ |
| ldr_ext.ll | 7 ; V5: ldrb
9 ; V6: ldrb
25 ; V5: ldrb
29 ; V6: ldrb
|
| ldr_frame.ll | 15 ; CHECK: ldrb
35 ; CHECK: ldrb
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm11_asm/ |
| h264bsd_interpolate_chroma_hor_ver.s | 180 LDRB tmp1, [ptrA]
181 LDRB tmp3, [ptrA, width]
182 LDRB tmp5, [ptrA, width, LSL #1]
193 LDRB tmp2, [ptrA, #1]!
194 LDRB tmp4, [ptrA, width]
195 LDRB tmp6, [ptrA, width, LSL #1]
214 LDRB tmp1, [ptrA, #1]!
215 LDRB tmp3, [ptrA, width]
216 LDRB tmp5, [ptrA, width, LSL #1]
269 LDRB tmp1, [ptrA
[all...] |
| h264bsd_interpolate_chroma_hor.s | 176 LDRB tmp1, [ptrA, width]
177 LDRB tmp2, [ptrA], #1
180 LDRB tmp3, [ptrA, width]
181 LDRB tmp4, [ptrA], #1
186 LDRB tmp1, [ptrA, width]
187 LDRB tmp2, [ptrA], #1
247 LDRB tmp1, [ptrA, width]
248 LDRB tmp2, [ptrA], #1
251 LDRB tmp3, [ptrA, width]
252 LDRB tmp4, [ptrA], #
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/ |
| armVCM4P10_Interpolate_Chroma_s.s | 146 LDRB x00, [pSrc, #+0]
147 LDRB x10, [pSrc1, #+0]
148 LDRB x01, [pSrc, #+1]
149 LDRB x11, [pSrc1, #+1]
150 LDRB x02, [pSrc, #+2]!
151 LDRB x12, [pSrc1, #+2]!
178 LDRB x20,[pSrc2, #-2]
183 LDRB x21,[pSrc2, #-1]
184 LDRB x22,[pSrc2, #+0]
235 LDRB pix00, [pSrc], #+
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
| armVCM4P10_DecodeCoeffsToPair_s.S | 23 LDRB r9,[r10,#2]
24 LDRB r8,[r10,#1]
25 LDRB r11,[r10],#3
36 LDRB r8,[r10],#1
68 LDRB r8,[r10],#1
94 LDRB r8,[r10],#1
98 LDRB r8,[r10],#1
118 LDRB r8,[r10],#1
122 LDRB r8,[r10],#1
163 LDRB r8,[r10],#
[all...] |
| /external/skia/legacy/src/opts/ |
| SkBitmapProcState_opts_arm.cpp | 58 "ldrb r4, [%[srcAddr], r4] \n\t" // load pixel 0 from image
60 "ldrb r5, [%[srcAddr], r5] \n\t" // load pixel 1 from image
62 "ldrb r6, [%[srcAddr], r6] \n\t" // load pixel 2 from image
64 "ldrb r7, [%[srcAddr], r7] \n\t" // load pixel 3 from image
66 "ldrb r8, [%[srcAddr], r8] \n\t" // load pixel 4 from image
68 "ldrb r9, [%[srcAddr], r9] \n\t" // load pixel 5 from image
70 "ldrb r10, [%[srcAddr], r10] \n\t" // load pixel 6 from image
72 "ldrb r11, [%[srcAddr], r11] \n\t" // load pixel 7 from image
143 "ldrb r4, [%[srcAddr], r4] \n\t" // load pixel 0 from image
145 "ldrb r5, [%[srcAddr], r5] \n\t" // load pixel 1 from imag
[all...] |
| /external/skia/src/opts/ |
| SkBitmapProcState_opts_arm.cpp | 58 "ldrb r4, [%[srcAddr], r4] \n\t" // load pixel 0 from image
60 "ldrb r5, [%[srcAddr], r5] \n\t" // load pixel 1 from image
62 "ldrb r6, [%[srcAddr], r6] \n\t" // load pixel 2 from image
64 "ldrb r7, [%[srcAddr], r7] \n\t" // load pixel 3 from image
66 "ldrb r8, [%[srcAddr], r8] \n\t" // load pixel 4 from image
68 "ldrb r9, [%[srcAddr], r9] \n\t" // load pixel 5 from image
70 "ldrb r10, [%[srcAddr], r10] \n\t" // load pixel 6 from image
72 "ldrb r11, [%[srcAddr], r11] \n\t" // load pixel 7 from image
143 "ldrb r4, [%[srcAddr], r4] \n\t" // load pixel 0 from image
145 "ldrb r5, [%[srcAddr], r5] \n\t" // load pixel 1 from imag
[all...] |
