| /external/llvm/lib/Target/Hexagon/ |
| HexagonFixupHwLoops.cpp | 64 MachineBasicBlock::iterator &MII,
129 MachineBasicBlock::iterator MII = MBB->begin();
130 while (MII != MIE) {
131 if (isHardwareLoop(MII)) {
132 RS.forward(MII);
133 assert(MII->getOperand(0).isMBB() &&
135 int Sub = InstOffset - BlockToInstOffset[MII->getOperand(0).getMBB()];
139 convertLoopInstr(MF, MII, RS);
140 MII = MBB->erase(MII);
[all...] |
| HexagonExpandPredSpillCode.cpp | 74 for (MachineBasicBlock::iterator MII = MBB->begin(); MII != MBB->end();
75 ++MII) {
76 MachineInstr *MI = MII;
90 BuildMI(*MBB, MII, MI->getDebugLoc(),
93 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Hexagon::ADD_rr),
96 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Hexagon::TFR_RsPd),
98 BuildMI(*MBB, MII, MI->getDebugLoc(),
103 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Hexagon::ADD_ri),
105 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Hexagon::TFR_RsPd)
[all...] |
| HexagonSplitTFRCondSets.cpp | 82 for (MachineBasicBlock::iterator MII = MBB->begin(); MII != MBB->end();
83 ++MII) {
84 MachineInstr *MI = MII;
107 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Opc1),
111 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Opc2),
114 MII = MBB->erase(MI);
115 --MII;
126 BuildMI(*MBB, MII, MI->getDebugLoc(),
131 BuildMI(*MBB, MII, MI->getDebugLoc()
[all...] |
| HexagonAsmPrinter.cpp | 204 MachineBasicBlock::const_instr_iterator MII = MI;
205 ++MII;
207 while (MII != MBB->end() && MII->isInsideBundle()) {
208 const MachineInstr *MInst = MII;
212 ++MII;
215 //BundleMIs.push_back(&*MII);
217 ++MII;
300 const MCInstrInfo &MII,
304 return(new HexagonInstPrinter(MAI, MII, MRI))
[all...] |
| HexagonNewValueJump.cpp | 154 MachineBasicBlock::iterator MII) {
157 if (MII->getDesc().mayStore())
161 if (MII->getOpcode() == Hexagon::CALLv3)
175 if (MII->getOpcode() == TargetOpcode::KILL ||
176 MII->getOpcode() == TargetOpcode::PHI ||
177 MII->getOpcode() == TargetOpcode::COPY)
184 if (MII->getOpcode() == Hexagon::TFR_condset_rr ||
185 MII->getOpcode() == Hexagon::TFR_condset_ii ||
186 MII->getOpcode() == Hexagon::TFR_condset_ri ||
187 MII->getOpcode() == Hexagon::TFR_condset_ir |
[all...] |
| /external/wpa_supplicant_8/src/drivers/ |
| driver_roboswitch.c | 13 #include <linux/mii.h>
22 /* MII access registers */
23 #define ROBO_MII_PAGE 0x10 /* MII page register */
24 #define ROBO_MII_ADDR 0x11 /* MII address register */
25 #define ROBO_MII_DATA_OFFSET 0x18 /* Start of MII data registers */
27 #define ROBO_MII_PAGE_ENABLE 0x01 /* MII page op code */
28 #define ROBO_MII_ADDR_WRITE 0x01 /* MII address write op code */
29 #define ROBO_MII_ADDR_READ 0x02 /* MII address read op code */
30 #define ROBO_MII_DATA_MAX 4 /* Consecutive MII data registers */
66 /* Copied from the kernel-only part of mii.h. *
88 struct mii_ioctl_data *mii = if_mii(&drv->ifr); local
104 struct mii_ioctl_data *mii = if_mii(&drv->ifr); local
[all...] |
| /external/llvm/lib/CodeGen/ |
| MachineInstrBundle.cpp | 43 for (MachineBasicBlock::instr_iterator MII = MBB->instr_begin(),
44 MIE = MBB->instr_end(); MII != MIE; ) {
45 MachineInstr *MI = &*MII;
50 while (++MII != MIE && MII->isBundledWithPred()) {
51 MII->unbundleFromPred();
52 for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) {
53 MachineOperand &MO = MII->getOperand(i);
64 ++MII;
227 MachineBasicBlock::instr_iterator MII = MBB.instr_begin()
[all...] |
| DeadMachineInstructionElim.cpp | 113 for (MachineBasicBlock::reverse_iterator MII = MBB->rbegin(),
114 MIE = MBB->rend(); MII != MIE; ) {
115 MachineInstr *MI = &*MII;
146 // MII is now pointing to the next instruction to process,
182 // We didn't delete the current instruction, so increment MII to
184 ++MII;
|
| /external/llvm/lib/Target/Hexagon/InstPrinter/ |
| HexagonInstPrinter.h | 26 const MCInstrInfo &MII,
28 : MCInstPrinter(MAI, MII, MRI), MII(MII) {}
71 return MII;
81 const MCInstrInfo &MII;
|
| /external/openssl/crypto/bn/asm/ |
| ia64.S | 175 { .mii; alloc r2=ar.pfs,4,12,0,16
189 { .mii; ADDP r15=0,r33 // ap
196 { .mii; (p16) ld8 r32=[r16],8 // b=*(bp++)
202 { .mii; (p16) ld8 r35=[r15],8 // a=*(ap++)
210 { .mii;
228 { .mii; alloc r2=ar.pfs,4,12,0,16
242 { .mii; ADDP r15=0,r33 // ap
249 { .mii; (p16) ld8 r32=[r16],8 // b=*(bp++)
255 { .mii; (p16) ld8 r35=[r15],8 // a=*(ap++)
263 { .mii;
[all...] |
| ia64-mont.pl | 306 { .mii; nop.m 0
310 { .mii; nop.m 0
341 { .mii; or nptr=aptr,bptr
506 { .mii; (p17) getf.sig a7=alo[8] // 1:
515 { .mii; (p17) getf.sig n5=nlo[6] // 3:
535 { .mii; (p17) getf.sig n6=nlo[7] // 7:
546 { .mii; (p16) getf.sig a1=alo[1] // 9:
555 { .mii; (p17) getf.sig n7=nlo[8] // 11:
566 { .mii; (p16) getf.sig a2=alo[2] // 13:
575 { .mii; (p16) nop.m 0 // 15
[all...] |
| /external/llvm/include/llvm/MC/ |
| MCInstPrinter.h | 33 const MCInstrInfo &MII;
48 MCInstPrinter(const MCAsmInfo &mai, const MCInstrInfo &mii,
50 : CommentStream(0), MAI(mai), MII(mii), MRI(mri), AvailableFeatures(0),
|
| /external/llvm/lib/Target/MBlaze/InstPrinter/ |
| MBlazeInstPrinter.h | 24 MBlazeInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
26 : MCInstPrinter(MAI, MII, MRI) {}
|
| /external/llvm/lib/Target/MSP430/InstPrinter/ |
| MSP430InstPrinter.h | 24 MSP430InstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
26 : MCInstPrinter(MAI, MII, MRI) {}
|
| /external/openssl/crypto/sha/asm/ |
| sha512-ia64.pl | 170 { .mii; and r8=7,input
209 { .mii; or $t1=$t1,E
275 { .mii; $LDW T1=[input]
278 { .mii; shrp X[ 6]=X[ 6],X[ 5],56
280 { .mii; shrp X[ 4]=X[ 4],X[ 3],56
282 { .mii; shrp X[ 2]=X[ 2],X[ 1],56
305 { .mii; $LDW T1=[input]
308 { .mii; shrp X[ 7]=X[ 7],X[ 6],48
310 { .mii; shrp X[ 5]=X[ 5],X[ 4],48
312 { .mii; shrp X[ 3]=X[ 3],X[ 2],4
[all...] |
| /external/grub/netboot/ |
| sis900.h | 223 /* MII register offsets */
234 /* mii registers specific to SiS 900 */
242 /* mii registers specific to AMD 79C901 */
247 /* mii registers specific to ICS 1893 */
255 /* MII Control register bit definitions. */
267 /* MII Status register bit */
286 /* MII NWAY Register Bits ...
|
| sis900.c | 94 {"SiS 900 Internal MII PHY", 0x001d, 0x8000, sis900_read_mode},
108 } mii;
263 /* probe for mii transceiver */
264 /* search for total of 32 possible mii phy addresses */
273 /* the mii is not accessable, try next one */
279 /* search our mii table for the current mii */
287 mii.chip_info = &mii_chip_table[i];
288 mii.phy_addr = phy_addr;
289 mii.status = sis900_mdio_read(phy_addr, MII_STATUS)
107 } mii; variable in typeref:struct:mii_phy
[all...] |
| /external/llvm/lib/Target/ARM/ |
| MLxExpansionPass.cpp | 314 MachineBasicBlock::iterator MII = MI;
315 MII = llvm::prior(MII);
316 MachineInstr &MI2 = *MII;
317 MII = llvm::prior(MII);
318 MachineInstr &MI1 = *MII;
334 MachineBasicBlock::reverse_iterator MII = MBB.rbegin(), E = MBB.rend();
335 while (MII != E) {
336 MachineInstr *MI = &*MII;
[all...] |
| /external/llvm/lib/MC/MCDisassembler/ |
| Disassembler.h | 69 llvm::OwningPtr<const llvm::MCInstrInfo> MII;
88 const MCInstrInfo *mII,
97 MII.reset(mII);
112 const MCInstrInfo *getInstrInfo() const { return MII.get(); }
|
| Disassembler.cpp | 50 const MCInstrInfo *MII = TheTarget->createMCInstrInfo();
51 if (!MII)
80 *MAI, *MII, *MRI, *STI);
87 STI, MII, Ctx, DisAsm, IP);
210 const MCInstrInfo *MII = DC->getInstrInfo();
216 AsmPrinterVariant, *MAI, *MII, *MRI, *STI);
|
| /external/llvm/include/llvm/CodeGen/ |
| MachineBasicBlock.h | 143 IterTy MII;
146 bundle_iterator(IterTy mii) : MII(mii) {}
148 bundle_iterator(Ty &mi) : MII(mi) {
152 bundle_iterator(Ty *mi) : MII(mi) {
159 : MII(I.getInstrIterator()) {}
160 bundle_iterator() : MII(0) {}
162 Ty &operator*() const { return *MII; }
165 operator Ty*() const { return MII; }
[all...] |
| /external/llvm/lib/Target/R600/InstPrinter/ |
| AMDGPUInstPrinter.h | 24 AMDGPUInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
26 : MCInstPrinter(MAI, MII, MRI) {}
|
| /external/llvm/lib/Target/XCore/InstPrinter/ |
| XCoreInstPrinter.h | 26 XCoreInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
28 : MCInstPrinter(MAI, MII, MRI) {}
|
| /external/openssl/crypto/md5/asm/ |
| md5-ia64.S | 384 { .mii ; \
467 .mii ; \
480 { .mii ; \
499 { .mii ; \
513 { .mii ; \
535 { .mii ; \
572 { .mii ; \
582 { .mii ; \
587 { .mii ; \
594 { .mii ; \
[all...] |
| /external/openssl/crypto/ |
| ia64cpuid.S | 22 { .mii; ld4 r2=[r32]
26 { .mii; mov ar.ccv=r2
59 { .mii; mov r9=ar.bsp
63 { .mii; add r9=96*8-8,r9
|
