/external/llvm/lib/Target/Mips/ |
Mips16ISelLowering.h | 54 MachineBasicBlock *emitSeliT16(unsigned Opc1, unsigned Opc2, 58 MachineBasicBlock *emitSelT16(unsigned Opc1, unsigned Opc2,
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Mips16ISelLowering.cpp | 478 (unsigned Opc1, unsigned Opc2, 517 BuildMI(BB, DL, TII->get(Opc1)).addMBB(sinkMBB); 543 (unsigned Opc1, unsigned Opc2, 582 BuildMI(BB, DL, TII->get(Opc1)).addMBB(sinkMBB);
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/external/llvm/lib/Target/Hexagon/ |
HexagonSplitTFRCondSets.cpp | 85 int Opc1, Opc2; 96 Opc1 = Hexagon::TFR_cPt; 100 Opc1 = Hexagon::TFR64_cPt; 107 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Opc1),
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/external/valgrind/main/VEX/priv/ |
host_ppc_defs.c | 3389 UInt opc1, sz = mode64 ? 8 : 4; local 3410 UInt opc1, sz = mode64 ? 8 : 4; local 3441 UInt opc1; local 3458 UInt opc1; local 4165 UInt opc1, opc2, sz = i->Pin.Load.sz; local 4255 UInt opc1, opc2, sz = i->Pin.Store.sz; local [all...] |
guest_ppc_toIR.c | 2993 UChar opc1 = ifieldOPC(theInstr); local 3630 UChar opc1 = ifieldOPC(theInstr); local 3750 UChar opc1 = ifieldOPC(theInstr); local 4128 UChar opc1 = ifieldOPC(theInstr); local 4257 UChar opc1 = ifieldOPC(theInstr); local 4507 UChar opc1 = ifieldOPC(theInstr); local 4764 UChar opc1 = ifieldOPC(theInstr); local 4952 UChar opc1 = ifieldOPC(theInstr); local 5094 UChar opc1 = ifieldOPC(theInstr); local 5265 UChar opc1 = ifieldOPC(theInstr); local 5475 UChar opc1 = ifieldOPC(theInstr); local 5660 UChar opc1 = ifieldOPC(theInstr); local 5808 UChar opc1 = ifieldOPC(theInstr); local 6019 UChar opc1 = ifieldOPC(theInstr); local 6289 UChar opc1 = ifieldOPC(theInstr); local 6383 UChar opc1 = ifieldOPC(theInstr); local 6640 UChar opc1 = ifieldOPC(theInstr); local 6936 UChar opc1 = ifieldOPC(theInstr); local 7074 UChar opc1 = ifieldOPC(theInstr); local 7205 UChar opc1 = ifieldOPC(theInstr); local 7444 UChar opc1 = ifieldOPC(theInstr); local 7923 UChar opc1 = ifieldOPC(theInstr); local 7991 UChar opc1 = ifieldOPC(theInstr); local 8090 UChar opc1 = ifieldOPC(theInstr); local 8295 UChar opc1 = ifieldOPC(theInstr); local 8377 UChar opc1 = ifieldOPC(theInstr); local 8478 UChar opc1 = ifieldOPC(theInstr); local 9942 UInt opc1 = ifieldOPC( theInstr ); local 10020 UInt opc1 = ifieldOPC( theInstr ); local 10214 UInt opc1 = ifieldOPC( theInstr ); local 11330 UInt opc1 = ifieldOPC( theInstr ); local 11526 UChar opc1 = ifieldOPC(theInstr); local 11577 UChar opc1 = ifieldOPC(theInstr); local 11623 UChar opc1 = ifieldOPC( theInstr ); local 12063 UChar opc1 = ifieldOPC( theInstr ); local 12306 UChar opc1 = ifieldOPC( theInstr ); local 12904 UChar opc1 = ifieldOPC( theInstr ); local 13372 UChar opc1 = ifieldOPC( theInstr ); local 13559 UChar opc1 = ifieldOPC( theInstr ); local 13683 UChar opc1 = ifieldOPC( theInstr ); local 13779 UChar opc1 = ifieldOPC( theInstr ); local 13937 UChar opc1 = ifieldOPC( theInstr ); local 13990 UChar opc1 = ifieldOPC( theInstr ); local 14079 UChar opc1 = ifieldOPC( theInstr ); local 14161 UChar opc1 = ifieldOPC( theInstr ); local 14281 UChar opc1 = ifieldOPC(theInstr); local 14413 UChar opc1 = ifieldOPC(theInstr); local 14499 UChar opc1 = ifieldOPC(theInstr); local 14953 UChar opc1 = ifieldOPC(theInstr); local 15010 UChar opc1 = ifieldOPC(theInstr); local 15102 UChar opc1 = ifieldOPC(theInstr); local 15368 UChar opc1 = ifieldOPC(theInstr); local 15505 UChar opc1 = ifieldOPC(theInstr); local 15686 UChar opc1 = ifieldOPC(theInstr); local 15952 UChar opc1 = ifieldOPC(theInstr); local 16061 UChar opc1 = ifieldOPC(theInstr); local 16154 UChar opc1 = ifieldOPC(theInstr); local 16481 UChar opc1; local [all...] |
host_mips_defs.c | 2602 UInt opc1, sz = mode64 ? 8 : 4; local 2638 UInt opc1, sz = mode64 ? 8 : 4; local [all...] |
host_arm_defs.c | 3714 UInt opc, opc1, opc2; local [all...] |
guest_mips_toIR.c | [all...] |
/external/llvm/lib/Target/ARM/ |
ARMInstrInfo.td | [all...] |
ARMInstrThumb2.td | [all...] |
ARMCodeEmitter.cpp | [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreInstrInfo.td | 204 multiclass F3R_2RUS<bits<5> opc1, bits<5> opc2, string OpcStr, SDNode OpNode> { 205 def _3r: _F3R<opc1, (outs GRRegs:$dst), (ins GRRegs:$b, GRRegs:$c), 213 multiclass F3R_2RUS_np<bits<5> opc1, bits<5> opc2, string OpcStr> { 214 def _3r: _F3R<opc1, (outs GRRegs:$dst), (ins GRRegs:$b, GRRegs:$c), 220 multiclass F3R_2RBITP<bits<5> opc1, bits<5> opc2, string OpcStr, 222 def _3r: _F3R<opc1, (outs GRRegs:$dst), (ins GRRegs:$b, GRRegs:$c), 241 multiclass FL3R_L2RUS<bits<9> opc1, bits<9> opc2, string OpcStr, 243 def _l3r: _FL3R<opc1, (outs GRRegs:$dst), (ins GRRegs:$b, GRRegs:$c), 252 multiclass FL3R_L2RBITP<bits<9> opc1, bits<9> opc2, string OpcStr, 254 def _l3r: _FL3R<opc1, (outs GRRegs:$dst), (ins GRRegs:$b, GRRegs:$c) [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelDAGToDAG.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86InstrControl.td | 62 multiclass ICBr<bits<8> opc1, bits<8> opc4, string asm, PatFrag Cond> { 63 def _1 : Ii8PCRel <opc1, RawFrm, (outs), (ins brtarget8:$dst), asm, [],
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X86InstrInfo.cpp | [all...] |
/external/llvm/include/llvm/Support/ |
PatternMatch.h | 504 template<typename LHS_t, typename RHS_t, unsigned Opc1, unsigned Opc2> 513 if (V->getValueID() == Value::InstructionVal + Opc1 || 519 return (CE->getOpcode() == Opc1 || CE->getOpcode() == Opc2) &&
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/external/qemu/tcg/arm/ |
tcg-target.c | 392 int cond, int opc0, int opc1, int rd0, int rd1, 398 tcg_out32(s, (cond << 28) | (0 << 25) | (opc1 << 21) | 405 tcg_out32(s, (cond << 28) | (0 << 25) | (opc1 << 21) | [all...] |
/external/llvm/lib/Target/ARM/Disassembler/ |
ARMDisassembler.cpp | 4532 unsigned opc1 = fieldFromInstruction(Val, 4, 4); local [all...] |