| /external/llvm/include/llvm/MC/ |
| MCCodeGenInfo.h | 31 /// OptLevel - Optimization level.
33 CodeGenOpt::Level OptLevel;
44 CodeGenOpt::Level getOptLevel() const { return OptLevel; }
|
| /external/llvm/include/llvm/CodeGen/ |
| SchedulerRegistry.h | 69 CodeGenOpt::Level OptLevel);
74 CodeGenOpt::Level OptLevel);
93 CodeGenOpt::Level OptLevel);
99 CodeGenOpt::Level OptLevel);
103 CodeGenOpt::Level OptLevel);
108 CodeGenOpt::Level OptLevel);
|
| /external/llvm/lib/Transforms/IPO/ |
| PassManagerBuilder.cpp | 48 OptLevel = 2;
103 if (OptLevel == 0) return;
118 if (OptLevel == 0) {
161 if (OptLevel > 2)
183 MPM.add(createLoopUnswitchPass(SizeLevel || OptLevel < 3));
189 if (LoopVectorize && OptLevel > 2)
196 if (OptLevel > 1)
213 if (OptLevel > 1 && UseGVNAfterVectorization)
233 if (OptLevel > 1) {
336 unsigned OptLevel) {
[all...] |
| /external/llvm/include/llvm-c/Transforms/ |
| PassManagerBuilder.h | 37 /** See llvm::PassManagerBuilder::OptLevel. */
40 unsigned OptLevel);
|
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeSubtarget.cpp | 49 enablePostRAScheduler(CodeGenOpt::Level OptLevel,
55 return HasItin && OptLevel >= CodeGenOpt::Default;
|
| MBlazeSubtarget.h | 57 bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
|
| /external/clang/lib/CodeGen/ |
| BackendUtil.cpp | 143 if (Builder.OptLevel > 0)
148 if (Builder.OptLevel > 0)
153 if (Builder.OptLevel > 0)
191 if (Builder.OptLevel > 0) {
210 unsigned OptLevel = CodeGenOpts.OptimizationLevel;
216 OptLevel = 0;
221 PMBuilder.OptLevel = OptLevel;
281 else if (OptLevel > 2)
288 if (OptLevel == 0
[all...] |
| /frameworks/compile/slang/ |
| slang_backend.cpp | 70 PMBuilder.OptLevel = mCodeGenOpts.OptimizationLevel;
82 PMBuilder.OptLevel = mCodeGenOpts.OptimizationLevel;
184 llvm::CodeGenOpt::Level OptLevel = llvm::CodeGenOpt::Default;
186 OptLevel = llvm::CodeGenOpt::None;
188 OptLevel = llvm::CodeGenOpt::Aggressive;
197 CGFT, OptLevel)) {
|
| /external/llvm/lib/Target/Mips/ |
| MipsSubtarget.cpp | 66 MipsSubtarget::enablePostRAScheduler(CodeGenOpt::Level OptLevel,
73 return OptLevel >= CodeGenOpt::Aggressive;
|
| /external/llvm/lib/ExecutionEngine/ |
| ExecutionEngineBindings.cpp | 120 unsigned OptLevel,
126 .setOptLevel((CodeGenOpt::Level)OptLevel);
155 unsigned OptLevel,
160 OptLevel, OutError);
|
| /external/llvm/lib/MC/ |
| MCCodeGenInfo.cpp | 22 OptLevel = OL;
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64.h | 30 CodeGenOpt::Level OptLevel);
|
| AArch64ISelDAGToDAG.cpp | 44 CodeGenOpt::Level OptLevel)
45 : SelectionDAGISel(tm, OptLevel), TM(tm),
413 CodeGenOpt::Level OptLevel) {
414 return new AArch64DAGToDAGISel(TM, OptLevel);
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430.h | 41 CodeGenOpt::Level OptLevel);
|
| MSP430ISelDAGToDAG.cpp | 97 MSP430DAGToDAGISel(MSP430TargetMachine &TM, CodeGenOpt::Level OptLevel)
98 : SelectionDAGISel(TM, OptLevel),
131 CodeGenOpt::Level OptLevel) {
132 return new MSP430DAGToDAGISel(TM, OptLevel);
358 IsLegalToFold(N1, Op, Op, OptLevel)) {
|
| /external/llvm/lib/Target/XCore/ |
| XCore.h | 28 CodeGenOpt::Level OptLevel);
|
| /external/llvm/lib/Target/ARM/ |
| ARM.h | 33 CodeGenOpt::Level OptLevel);
|
| /external/llvm/lib/Target/Hexagon/ |
| Hexagon.h | 33 CodeGenOpt::Level OptLevel);
|
| /external/llvm/lib/Target/ |
| TargetSubtargetInfo.cpp | 30 CodeGenOpt::Level OptLevel,
|
| /external/llvm/tools/opt/ |
| opt.cpp | 419 /// based on selected optimization level, OptLevel. This routine
422 /// OptLevel - Optimization Level
424 unsigned OptLevel, unsigned SizeLevel) {
428 Builder.OptLevel = OptLevel;
433 } else if (OptLevel > 1) {
439 if (OptLevel > 2)
446 Builder.DisableUnrollLoops = OptLevel == 0;
466 Builder.OptLevel = 3;
|
| /external/llvm/include/llvm/Transforms/IPO/ |
| PassManagerBuilder.h | 31 /// Builder.OptLevel = 2;
88 unsigned OptLevel;
|
| /external/llvm/include/llvm-c/ |
| ExecutionEngine.h | 75 unsigned OptLevel,
91 unsigned OptLevel,
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCSubtarget.cpp | 125 CodeGenOpt::Level OptLevel,
147 return OptLevel >= CodeGenOpt::Default;
|
| /external/llvm/lib/Target/R600/ |
| AMDGPUTargetMachine.cpp | 55 CodeGenOpt::Level OptLevel
58 LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OptLevel),
|
| /external/llvm/include/llvm/Target/ |
| TargetSubtargetInfo.h | 70 virtual bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
|
