/external/llvm/lib/Target/Sparc/ |
SparcInstrFormats.td | 93 bits<13> simm13; 99 let Inst{12-0} = simm13;
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SparcInstrInfo.td | 48 def simm13 : PatLeaf<(imm), [{ return isInt<13>(N->getSExtValue()); }]>; 189 [(set IntRegs:$dst, (OpNode IntRegs:$b, simm13:$c))]>; 230 let rd = 0, rs1 = 1, simm13 = 3 in 301 "jmp %o7+$val", [(retflag simm13:$val)]>; 785 def : Pat<(i32 simm13:$val), [all...] |
/external/valgrind/main/VEX/priv/ |
host_arm_defs.h | 133 Int simm13; /* -4095 .. +4095 */ member in struct:__anon16105::__anon16106::__anon16107 144 extern ARMAMode1* ARMAMode1_RI ( HReg reg, Int simm13 );
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host_arm_defs.c | 219 ARMAMode1* ARMAMode1_RI ( HReg reg, Int simm13 ) { 223 am->ARMam1.RI.simm13 = simm13; 224 vassert(-4095 <= simm13 && simm13 <= 4095); 240 vex_printf("%d(", am->ARMam1.RI.simm13); [all...] |
host_arm_isel.c | 657 && am->ARMam1.RI.simm13 >= -4095 658 && am->ARMam1.RI.simm13 <= 4095 ); 686 /* {Add32,Sub32}(expr,simm13) */ [all...] |
/external/llvm/docs/ |
WritingAnLLVMBackend.rst | [all...] |