| /external/llvm/test/CodeGen/Mips/ |
| atomic.ll | 84 ; CHECK: sllv $[[R6:[0-9]+]], $[[R5]], $[[R4]]
86 ; CHECK: sllv $[[R9:[0-9]+]], $4, $[[R4]]
115 ; CHECK: sllv $[[R6:[0-9]+]], $[[R5]], $[[R4]]
117 ; CHECK: sllv $[[R9:[0-9]+]], $4, $[[R4]]
146 ; CHECK: sllv $[[R6:[0-9]+]], $[[R5]], $[[R4]]
148 ; CHECK: sllv $[[R9:[0-9]+]], $4, $[[R4]]
178 ; CHECK: sllv $[[R6:[0-9]+]], $[[R5]], $[[R4]]
180 ; CHECK: sllv $[[R9:[0-9]+]], $4, $[[R4]]
208 ; CHECK: sllv $[[R6:[0-9]+]], $[[R5]], $[[R4]]
211 ; CHECK: sllv $[[R9:[0-9]+]], $[[R8]], $[[R4]
[all...] |
| sll2.ll | 12 ; 16: sllv ${{[0-9]+}}, ${{[0-9]+}}
|
| /external/v8/test/cctest/ |
| test-disasm-mips.cc | 234 COMPARE(sllv(a0, a1, a2),
235 "00c52004 sllv a0, a1, a2");
236 COMPARE(sllv(s0, s1, s2),
237 "02518004 sllv s0, s1, s2");
238 COMPARE(sllv(t2, t3, t4),
239 "018b5004 sllv t2, t3, t4");
240 COMPARE(sllv(v0, v1, fp),
241 "03c31004 sllv v0, v1, fp");
|
| /external/valgrind/main/none/tests/mips32/ |
| MIPS32int.c | [all...] |
| MIPS32int.stdout.exp | [all...] |
| MIPS32int.stdout.exp-BE | [all...] |
| MIPS32int.stdout.exp-mips32 | [all...] |
| /external/kernel-headers/original/asm-mips/ |
| asm.h | 263 #define INT_SLLV sllv
300 #define LONG_SLLV sllv
349 #define PTR_SLLV sllv
|
| /bionic/libc/kernel/arch-mips/asm/ |
| asm.h | 117 #define INT_SLLV sllv
157 #define LONG_SLLV sllv
210 #define PTR_SLLV sllv
|
| /development/ndk/platforms/android-9/arch-mips/include/asm/ |
| asm.h | 117 #define INT_SLLV sllv
157 #define LONG_SLLV sllv
210 #define PTR_SLLV sllv
|
| /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/ |
| asm.h | 117 #define INT_SLLV sllv
157 #define LONG_SLLV sllv
210 #define PTR_SLLV sllv
|
| /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/ |
| asm.h | 117 #define INT_SLLV sllv
157 #define LONG_SLLV sllv
210 #define PTR_SLLV sllv
|
| /external/llvm/test/MC/Mips/ |
| mips-alu-instructions.s | 20 # CHECK: sllv $2, $3, $5 # encoding: [0x04,0x10,0xa3,0x00]
47 sllv $2, $3, $5
|
| mips64-alu-instructions.s | 20 # CHECK: sllv $2, $3, $5 # encoding: [0x04,0x10,0xa3,0x00]
47 sllv $2, $3, $5
|
| /system/core/include/private/pixelflinger/ |
| ggl_fixed.h | 332 "sllv %[tmp2],%[tmp2],%[tmp1] \t\n"
350 "sllv %[tmp2],%[tmp2],%[tmp1] \t\n"
404 "sllv %[tmp2],%[tmp2],%[tmp1] \t\n"
422 "sllv %[tmp2],%[tmp2],%[tmp1] \t\n"
|
| /external/v8/src/mips/ |
| constants-mips.cc | 246 case SLLV:
|
| disasm-mips.cc | 649 case SLLV:
650 Format(instr, "sllv 'rd, 'rt, 'rs");
|
| code-stubs-mips.cc | 507 __ sllv(source_, source_, zeros_);
730 __ sllv(scratch2, scratch2, dst1);
743 __ sllv(dst1, int_scratch, scratch2);
749 __ sllv(scratch2, int_scratch, scratch2);
[all...] |
| constants-mips.h | 307 SLLV = ((0 << 3) + 4),
|
| /external/llvm/test/MC/Disassembler/Mips/ |
| mips32.txt | 336 # CHECK: sllv $2, $3, $5
|
| mips32_le.txt | 336 # CHECK: sllv $2, $3, $5
|
| mips32r2.txt | 357 # CHECK: sllv $2, $3, $5
|
| mips32r2_le.txt | 357 # CHECK: sllv $2, $3, $5
|
| /dalvik/vm/compiler/codegen/mips/ |
| MipsLIR.h | 450 kMipsSllv, /* sllv d,t,s [000000] s[25..21] t[20..16] d[15..11] [00000000100] */
|
| /external/webkit/Source/JavaScriptCore/assembler/ |
| MIPSAssembler.h | 383 void sllv(RegisterID rd, RegisterID rt, int rs) function in class:JSC::MIPSAssembler
|
