| /dalvik/vm/compiler/codegen/ |
| Ralloc.h | 40 static inline int dvmCompilerS2VReg(CompilationUnit *cUnit, int sReg)
42 assert(sReg != INVALID_SREG);
43 return DECODE_REG(dvmConvertSSARegToDalvik(cUnit, sReg));
53 * Get the "real" sreg number associated with an sReg slot. In general,
54 * sReg values passed through codegen are the SSA names created by
67 static inline bool dvmCompilerLiveOut(CompilationUnit *cUnit, int sReg)
94 extern void dvmCompilerMarkLive(CompilationUnit *cUnit, int reg, int sReg);
177 /* Clobber any temp associated with an sReg. Could be in either class */
178 extern void dvmCompilerClobberSReg(CompilationUnit *cUnit, int sReg);
[all...] |
| RallocUtil.cpp | 30 #define SREG(c, s) ((c)->regLocation[(s)].sRegLow)
32 * Get the "real" sreg number associated with an sReg slot. In general,
33 * sReg values passed through codegen are the SSA names created by
67 regs[i].sReg = INVALID_SREG;
78 p[i].dirty, p[i].sReg,(int)p[i].defStart, (int)p[i].defEnd);
115 if (dvmCompilerS2VReg(cUnit, info2->sReg) <
116 dvmCompilerS2VReg(cUnit, info1->sReg))
119 dvmCompilerS2VReg(cUnit, info1->sReg) << 2,
130 dvmCompilerS2VReg(cUnit, info->sReg) << 2
[all...] |
| /dalvik/vm/compiler/codegen/mips/ |
| Ralloc.h | 44 static inline int dvmCompilerS2VReg(CompilationUnit *cUnit, int sReg)
46 assert(sReg != INVALID_SREG);
47 return DECODE_REG(dvmConvertSSARegToDalvik(cUnit, sReg));
57 * Get the "real" sreg number associated with an sReg slot. In general,
58 * sReg values passed through codegen are the SSA names created by
71 static inline bool dvmCompilerLiveOut(CompilationUnit *cUnit, int sReg)
98 extern void dvmCompilerMarkLive(CompilationUnit *cUnit, int reg, int sReg);
181 /* Clobber any temp associated with an sReg. Could be in either class */
182 extern void dvmCompilerClobberSReg(CompilationUnit *cUnit, int sReg);
[all...] |
| RallocUtil.cpp | 32 #define SREG(c, s) ((c)->regLocation[(s)].sRegLow)
34 * Get the "real" sreg number associated with an sReg slot. In general,
35 * sReg values passed through codegen are the SSA names created by
69 regs[i].sReg = INVALID_SREG;
80 p[i].dirty, p[i].sReg,(int)p[i].defStart, (int)p[i].defEnd);
117 if (dvmCompilerS2VReg(cUnit, info2->sReg) <
118 dvmCompilerS2VReg(cUnit, info1->sReg))
121 dvmCompilerS2VReg(cUnit, info1->sReg) << 2,
132 dvmCompilerS2VReg(cUnit, info->sReg) << 2
[all...] |
| CodegenFactory.cpp | 261 * Perform null-check on a register. sReg is the ssa register being checked,
263 * indicates that sReg has been checked before the check request is ignored.
265 static MipsLIR *genNullCheck(CompilationUnit *cUnit, int sReg, int mReg,
269 if (dvmIsBitSet(cUnit->regPool->nullCheckedRegs, sReg)) {
272 dvmSetBit(cUnit->regPool->nullCheckedRegs, sReg);
|
| CodegenCommon.cpp | 344 * return the target Dalvik sReg[s] and convert the next to a
|
| /external/arduino/hardware/arduino/cores/arduino/ |
| wiring_digital.c | 42 uint8_t oldSREG = SREG;
45 SREG = oldSREG;
47 uint8_t oldSREG = SREG;
50 SREG = oldSREG;
140 uint8_t oldSREG = SREG;
143 SREG = oldSREG;
145 uint8_t oldSREG = SREG;
148 SREG = oldSREG;
|
| wiring.c | 66 uint8_t oldSREG = SREG;
72 SREG = oldSREG;
79 uint8_t oldSREG = SREG, t;
100 SREG = oldSREG;
|
| /external/chromium/chrome/common/extensions/docs/examples/apps/hello-php/lib/lightopenid/ |
| openid.php | 30 * AX and SREG extensions are supported.
36 * If the server supports only SREG or OpenID 1.1, these are automaticaly
37 * mapped to SREG names, so that user doesn't have to know anything about the server.
54 , $ax = false, $sreg = false, $data;
212 # We ignore it for MyOpenID, as it breaks sreg if using OpenID 2.0
223 # Does the server advertise support for either AX or SREG?
225 $this->sreg = strpos($content, '<Type>http://openid.net/sreg/1.0</Type>') variable
226 || strpos($content, '<Type>http://openid.net/extensions/sreg/1.1</Type>');
246 # AX can be used only with OpenID 2.0, so checking only SREG
247 $this->sreg = strpos($content, '<Type>http:\/\/openid.net\/sreg\/1.0<\/Type>') variable
[all...] |
| /dalvik/vm/compiler/codegen/arm/ |
| ArchFactory.cpp | 53 * Perform null-check on a register. sReg is the ssa register being checked,
55 * indicates that sReg has been checked before the check request is ignored.
57 static TGT_LIR *genNullCheck(CompilationUnit *cUnit, int sReg, int mReg,
61 if (dvmIsBitSet(cUnit->regPool->nullCheckedRegs, sReg)) {
64 dvmSetBit(cUnit->regPool->nullCheckedRegs, sReg);
|
| CodegenCommon.cpp | 338 * return the target Dalvik sReg[s] and convert the next to a
|
| /external/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
| MemRegion.h | 407 SubRegion(const MemRegion* sReg, Kind k) : MemRegion(k), superRegion(sReg) {}
468 TypedRegion(const MemRegion* sReg, Kind k) : SubRegion(sReg, k) {}
490 TypedValueRegion(const MemRegion* sReg, Kind k) : TypedRegion(sReg, k) {}
522 CodeTextRegion(const MemRegion *sreg, Kind k) : TypedRegion(sreg, k) {}
536 FunctionTextRegion(const NamedDecl *fd, const MemRegion* sreg)
537 : CodeTextRegion(sreg, FunctionTextRegionKind), FD(fd)
[all...] |
| /external/llvm/lib/CodeGen/ |
| RegisterScavenging.cpp | 355 unsigned SReg = findSurvivorReg(I, Candidates, 25, UseMI);
358 if (!isAliasUsed(SReg)) {
359 DEBUG(dbgs() << "Scavenged register: " << TRI->getName(SReg) << "\n");
360 return SReg;
367 ScavengedReg = SReg;
371 if (!TRI->saveScavengerRegister(*MBB, I, UseMI, RC, SReg)) {
375 TII->storeRegToStackSlot(*MBB, I, SReg, true, ScavengingFrameIndex, RC,TRI);
382 TII->loadRegFromStackSlot(*MBB, UseMI, SReg, ScavengingFrameIndex, RC, TRI);
392 // ScavengedReg = SReg;
395 DEBUG(dbgs() << "Scavenged register (with spill): " << TRI->getName(SReg) <<
[all...] |
| /external/clang/lib/StaticAnalyzer/Core/ |
| MemRegion.cpp | 229 ObjCIvarRegion::ObjCIvarRegion(const ObjCIvarDecl *ivd, const MemRegion* sReg)
230 : DeclRegion(ivd, sReg, ObjCIvarRegionKind) {}
337 const MemRegion *sreg) {
340 ID.AddPointer(sreg);
386 const MemRegion *sReg) {
390 ID.AddPointer(sReg);
399 const MemRegion *sReg) {
401 ID.AddPointer(sReg);
411 const MemRegion *SReg) {
414 ID.AddPointer(SReg);
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| VirtRegMap.h | 137 /// @brief records virtReg is a split live interval from SReg.
138 void setIsSplitFromReg(unsigned virtReg, unsigned SReg) {
139 Virt2SplitMap[virtReg] = SReg;
|
| /external/llvm/lib/Target/ARM/ |
| A15SDOptimizer.cpp | 107 unsigned getDPRLaneFromSPR(unsigned SReg);
122 unsigned getPrefSPRLane(unsigned SReg);
151 unsigned A15SDOptimizer::getDPRLaneFromSPR(unsigned SReg) {
152 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1,
160 unsigned A15SDOptimizer::getPrefSPRLane(unsigned SReg) {
161 if (!TRI->isVirtualRegister(SReg))
162 return getDPRLaneFromSPR(SReg);
164 MachineInstr *MI = MRI->getVRegDef(SReg);
166 MachineOperand *MO = MI->findRegisterDefOperand(SReg);
173 SReg = MI->getOperand(1).getReg()
[all...] |
| /external/v8/src/arm/ |
| simulator-arm.cc | [all...] |
| simulator-arm.h | 168 void set_s_register_from_float(int sreg, const float dbl);
169 float get_float_from_s_register(int sreg);
|
| /dalvik/vm/compiler/codegen/arm/Thumb/ |
| Factory.cpp | 577 OpSize size, int sReg)
580 * on base (which must have an associated sReg and MIR). If not
699 int sReg)
702 size, sReg);
707 int sReg)
710 kLong, sReg);
|
| /dalvik/vm/compiler/codegen/mips/Mips32/ |
| Factory.cpp | 594 OpSize size, int sReg)
597 * on base (which must have an associated sReg and MIR). If not
704 int sReg)
707 size, sReg);
712 int sReg)
715 kLong, sReg);
|
| /dalvik/vm/compiler/codegen/arm/Thumb2/ |
| Factory.cpp | 872 * on base (which must have an associated sReg and MIR). If not
877 OpSize size, int sReg)
902 -1, kWord, sReg);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCRegisterInfo.cpp | 500 unsigned SReg = MF.getRegInfo().createVirtualRegister(is64Bit ? G8RC : GPRC);
503 BuildMI(MBB, II, dl, TII.get(is64Bit ? PPC::LIS8 : PPC::LIS), SReg)
505 BuildMI(MBB, II, dl, TII.get(is64Bit ? PPC::ORI8 : PPC::ORI), SReg)
506 .addReg(SReg, RegState::Kill)
529 MI.getOperand(OperandBase + 1).ChangeToRegister(SReg, false, false, true);
|
| /dalvik/vm/mterp/mips/ |
| header.S | 110 #define GET_PREFETCHED_OPCODE(dreg, sreg) andi dreg, sreg, 255
|
| /external/qemu/ |
| gdbstub.c | 589 #define LOAD_SEG(index, sreg)\
591 if (tmp != env->segs[sreg].selector)\
592 cpu_x86_load_seg(env, sreg, tmp);
596 #define LOAD_SEG(index, sreg) do {} while(0)
[all...] |
| /external/valgrind/main/VEX/priv/ |
| guest_x86_toIR.c | 487 static Int segmentGuestRegOffset ( UInt sreg )
489 switch (sreg) {
564 static IRExpr* getSReg ( UInt sreg )
566 return IRExpr_Get( segmentGuestRegOffset(sreg), Ity_I16 );
569 static void putSReg ( UInt sreg, IRExpr* e )
572 stmt( IRStmt_Put( segmentGuestRegOffset(sreg), e ) );
1421 Int sreg; local
[all...] |
