| /dalvik/vm/mterp/armv5te/ |
| OP_NEG_DOUBLE.S | 2 %include "armv5te/unopWide.S" {"instr":"add r1, r1, #0x80000000"}
|
| OP_NEG_FLOAT.S | 2 %include "armv5te/unop.S" {"instr":"add r0, r0, #0x80000000"}
|
| /dalvik/vm/mterp/armv6t2/ |
| OP_NEG_DOUBLE.S | 2 %include "armv6t2/unopWide.S" {"instr":"add r1, r1, #0x80000000"}
|
| OP_NEG_FLOAT.S | 2 %include "armv6t2/unop.S" {"instr":"add r0, r0, #0x80000000"}
|
| /dalvik/vm/mterp/mips/ |
| OP_NEG_DOUBLE.S | 2 %include "mips/unopWide.S" {"instr":"addu a1, a1, 0x80000000"}
|
| OP_NEG_FLOAT.S | 2 %include "mips/unop.S" {"instr":"addu a0, a0, 0x80000000"}
|
| OP_FLOAT_TO_LONG.S | 13 li rRESULT1, ~0x80000000
22 li rRESULT1, 0x80000000
41 li rRESULT1, ~0x80000000
47 li rRESULT1, 0x80000000
|
| /dalvik/vm/mterp/x86/ |
| OP_DIV_INT.S | 2 %include "x86/bindiv.S" {"result":"%eax","special":"$0x80000000"}
|
| OP_DIV_INT_2ADDR.S | 2 %include "x86/bindiv2addr.S" {"result":"%eax","special":"$0x80000000"}
|
| OP_DIV_INT_LIT16.S | 2 %include "x86/bindivLit16.S" {"result":"%eax","special":"$0x80000000"}
|
| OP_DIV_INT_LIT8.S | 2 %include "x86/bindivLit8.S" {"result":"%eax","special":"$0x80000000"}
|
| /external/compiler-rt/lib/ubsan/lit_tests/Integer/ |
| div-overflow.cpp | 6 unsigned(0x80000000) / -1;
9 int32_t(0x80000000) / -1;
|
| /external/smali/smali/src/test/resources/LexerTest/ |
| IntegerLiteralTest.smali | 6 0x80000000
11 -0x80000000
|
| /external/valgrind/main/none/tests/arm/ |
| v6intThumb.c | 242 TESTINST2("movs r0, r1", 0x80000000, r0, r1, cv);
252 TESTINST2("mvns r0, r1", 0x80000000, r0, r1, cv);
263 TESTINST3("adds r0, r1, r2", 0x80000000, -1, r0, r1, r2, 0);
264 TESTINST3("adds r0, r1, r2", 0x80000000, 0, r0, r1, r2, 0);
[all...] |
| v6intThumb.stdout.exp | 4 cmp r3, r6 :: rd 0x00000001 rm 0x00000000, rn 0x00000001, c:v-in 0, cpsr 0x80000000 N
7 cmp r3, r6 :: rd 0x80000000 rm 0x00000000, rn 0x80000000, c:v-in 0, cpsr 0x90000000 N V
8 cmp r3, r6 :: rd 0x00000000 rm 0x80000000, rn 0x00000000, c:v-in 0, cpsr 0xa0000000 N C
11 cmp r3, r6 :: rd 0x00000001 rm 0x00000000, rn 0x00000001, c:v-in 0, cpsr 0x80000000 N
14 cmp r3, r6 :: rd 0x80000000 rm 0x00000000, rn 0x80000000, c:v-in 0, cpsr 0x90000000 N V
15 cmp r3, r6 :: rd 0x00000000 rm 0x80000000, rn 0x00000000, c:v-in 0, cpsr 0xa0000000 N C
18 cmp r3, r6 :: rd 0x00000001 rm 0x00000000, rn 0x00000001, c:v-in 0, cpsr 0x80000000 N
21 cmp r3, r6 :: rd 0x80000000 rm 0x00000000, rn 0x80000000, c:v-in 0, cpsr 0x90000000 N
[all...] |
| /external/compiler-rt/test/Unit/ |
| mulosi4_test.c | 113 if (test__mulosi4(0x80000000, -2, 0x80000000, 1))
115 if (test__mulosi4(-2, 0x80000000, 0x80000000, 1))
117 if (test__mulosi4(0x80000000, -1, 0x80000000, 1))
119 if (test__mulosi4(-1, 0x80000000, 0x80000000, 1))
121 if (test__mulosi4(0x80000000, 0, 0, 0))
123 if (test__mulosi4(0, 0x80000000, 0, 0)
[all...] |
| mulvsi3_test.c | 105 // if (test__mulvsi3(0x80000000, -2, 0x80000000)) // abort
107 // if (test__mulvsi3(-2, 0x80000000, 0x80000000)) // abort
109 // if (test__mulvsi3(0x80000000, -1, 0x80000000)) // abort
111 // if (test__mulvsi3(-1, 0x80000000, 0x80000000)) // abort
113 if (test__mulvsi3(0x80000000, 0, 0))
115 if (test__mulvsi3(0, 0x80000000, 0)
[all...] |
| umodsi3_test.c | 39 {0x00000000, 0x80000000, 0x00000000},
50 {0x00000001, 0x80000000, 0x00000001},
61 {0x00000002, 0x80000000, 0x00000002},
72 {0x00000003, 0x80000000, 0x00000003},
83 {0x00000010, 0x80000000, 0x00000010},
94 {0x078644FA, 0x80000000, 0x078644FA},
105 {0x0747AE14, 0x80000000, 0x0747AE14},
116 {0x7FFFFFFF, 0x80000000, 0x7FFFFFFF},
120 {0x80000000, 0x00000001, 0x00000000},
121 {0x80000000, 0x00000002, 0x00000000}
[all...] |
| udivsi3_test.c | 39 {0x00000000, 0x80000000, 0x00000000},
50 {0x00000001, 0x80000000, 0x00000000},
61 {0x00000002, 0x80000000, 0x00000000},
72 {0x00000003, 0x80000000, 0x00000000},
83 {0x00000010, 0x80000000, 0x00000000},
94 {0x078644FA, 0x80000000, 0x00000000},
105 {0x0747AE14, 0x80000000, 0x00000000},
116 {0x7FFFFFFF, 0x80000000, 0x00000000},
120 {0x80000000, 0x00000001, 0x80000000},
[all...] |
| addvsi3_test.c | 35 // test__addvsi3(0x80000000, -1); // should abort
36 // test__addvsi3(-1, 0x80000000); // should abort
40 if (test__addvsi3(0x80000000, 1))
42 if (test__addvsi3(1, 0x80000000))
44 if (test__addvsi3(0x80000000, 0))
46 if (test__addvsi3(0, 0x80000000))
|
| /external/llvm/test/MC/MachO/ |
| section-flags.s | 5 // CHECK: 'flags', 0x80000000
|
| /external/valgrind/main/none/tests/mips32/ |
| MIPS32int.stdout.exp | 8 add $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x00000000
12 add $t0, $t1, $t2 :: rd 0x80000000 rs 0x00000000, rt 0x80000000
13 add $t0, $t1, $t2 :: rd 0xffffffff rs 0x7fffffff, rt 0x80000000
21 addi $t0, $t1, 0 :: rt 0x80000000 rs 0x80000000, imm 0x00000000
23 addi $t0, $t1, 0 :: rt 0x80000000 rs 0x80000000, imm 0x00000000
31 addiu $t0, $t1, 0 :: rt 0x80000000 rs 0x80000000, imm 0x0000000
[all...] |
| MIPS32int.stdout.exp-BE | 8 add $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x00000000
12 add $t0, $t1, $t2 :: rd 0x80000000 rs 0x00000000, rt 0x80000000
13 add $t0, $t1, $t2 :: rd 0xffffffff rs 0x7fffffff, rt 0x80000000
21 addi $t0, $t1, 0 :: rt 0x80000000 rs 0x80000000, imm 0x00000000
23 addi $t0, $t1, 0 :: rt 0x80000000 rs 0x80000000, imm 0x00000000
31 addiu $t0, $t1, 0 :: rt 0x80000000 rs 0x80000000, imm 0x0000000
[all...] |
| MIPS32int.c | 139 TESTINST1("add $t0, $t1, $t2", 0x80000000, 0, t0, t1, t2);
143 TESTINST1("add $t0, $t1, $t2", 0, 0x80000000, t0, t1, t2);
144 TESTINST1("add $t0, $t1, $t2", 0x7fffffff, 0x80000000, t0, t1, t2);
153 TESTINST2("addi $t0, $t1, 0", 0x80000000, 0, t0, t1);
155 TESTINST2("addi $t0, $t1, 0", 0x80000000, 0, t0, t1);
164 TESTINST2("addiu $t0, $t1, 0", 0x80000000, 0, t0, t1);
166 TESTINST2("addiu $t0, $t1, 0", 0x80000000, 0, t0, t1);
182 TESTINST1("addu $t0, $t1, $t2", 0, 0x80000000, t0, t1, t2);
183 TESTINST1("addu $t0, $t1, $t2", 0x80000000, 0, t0, t1, t2);
184 TESTINST1("addu $t0, $t1, $t2", 0x80000000, 0x80000000, t0, t1, t2)
[all...] |
| MIPS32int.stdout.exp-mips32 | 8 add $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x00000000
12 add $t0, $t1, $t2 :: rd 0x80000000 rs 0x00000000, rt 0x80000000
13 add $t0, $t1, $t2 :: rd 0xffffffff rs 0x7fffffff, rt 0x80000000
21 addi $t0, $t1, 0 :: rt 0x80000000 rs 0x80000000, imm 0x00000000
23 addi $t0, $t1, 0 :: rt 0x80000000 rs 0x80000000, imm 0x00000000
31 addiu $t0, $t1, 0 :: rt 0x80000000 rs 0x80000000, imm 0x0000000
[all...] |
