Lines Matching refs:entry
333 static size_t ComputeSize(const X86EncodingMap* entry, int base, int displacement, bool has_sib) {
335 if (entry->skeleton.prefix1 > 0) {
337 if (entry->skeleton.prefix2 > 0) {
342 if (entry->skeleton.opcode == 0x0F) {
344 if (entry->skeleton.extra_opcode1 == 0x38 || entry->skeleton.extra_opcode1 == 0x3A) {
355 if (entry->opcode != kX86Lea32RA) {
356 DCHECK_NE(entry->flags & (IS_LOAD | IS_STORE), 0ULL) << entry->name;
360 size += entry->skeleton.immediate_bytes;
365 const X86EncodingMap* entry = &X86Mir2Lir::EncodingMap[lir->opcode];
366 switch (entry->kind) {
374 return ComputeSize(entry, 0, 0, false);
376 return ComputeSize(entry, lir->operands[0], lir->operands[1], false);
378 return ComputeSize(entry, lir->operands[0], lir->operands[3], true);
380 return ComputeSize(entry, lir->operands[0], lir->operands[1], false);
382 return ComputeSize(entry, lir->operands[0], lir->operands[3], true);
384 return ComputeSize(entry, 0, lir->operands[0], false);
386 return ComputeSize(entry, 0, 0, false);
388 return ComputeSize(entry, 0, 0, false);
390 return ComputeSize(entry, lir->operands[1], lir->operands[2], false);
392 return ComputeSize(entry, lir->operands[1], lir->operands[4], true);
394 return ComputeSize(entry, 0, 0x12345678, false); // displacement size is always 32bit
396 size_t size = ComputeSize(entry, 0, 0, false);
397 if (entry->skeleton.ax_opcode == 0) {
406 return ComputeSize(entry, lir->operands[0], lir->operands[1], false);
408 return ComputeSize(entry, lir->operands[0], lir->operands[3], true);
410 return ComputeSize(entry, 0, 0x12345678, false); // displacement size is always 32bit
412 return ComputeSize(entry, 0, 0, false);
414 return ComputeSize(entry, lir->operands[1], lir->operands[2], false);
416 return ComputeSize(entry, lir->operands[1], lir->operands[4], true);
418 return 1 + entry->skeleton.immediate_bytes;
421 return ComputeSize(entry, 0, 0, false) - (lir->operands[1] == 1 ? 1 : 0);
424 return ComputeSize(entry, lir->operands[0], lir->operands[1], false) -
428 return ComputeSize(entry, lir->operands[0], lir->operands[3], true) -
431 return ComputeSize(entry, 0, 0, false);
433 return ComputeSize(entry, lir->operands[0], lir->operands[1], false);
435 return ComputeSize(entry, lir->operands[0], lir->operands[3], true);
437 return ComputeSize(entry, 0, 0, false);
439 return ComputeSize(entry, lir->operands[0], lir->operands[1], false);
441 return ComputeSize(entry, lir->operands[0], lir->operands[3], true);
462 return ComputeSize(entry, lir->operands[0], lir->operands[1], false);
464 return ComputeSize(entry, lir->operands[0], lir->operands[3], true);
466 return ComputeSize(entry, 0, 0x12345678, false); // displacement size is always 32bit
472 if (entry->opcode == kX86PcRelLoadRA) {
474 return ComputeSize(entry, lir->operands[1], 0x12345678, true);
476 DCHECK(entry->opcode == kX86PcRelAdr);
487 UNIMPLEMENTED(FATAL) << "Unimplemented size encoding for: " << entry->name;
516 void X86Mir2Lir::EmitOpReg(const X86EncodingMap* entry, uint8_t reg) {
517 if (entry->skeleton.prefix1 != 0) {
518 code_buffer_.push_back(entry->skeleton.prefix1);
519 if (entry->skeleton.prefix2 != 0) {
520 code_buffer_.push_back(entry->skeleton.prefix2);
523 DCHECK_EQ(0, entry->skeleton.prefix2);
525 code_buffer_.push_back(entry->skeleton.opcode);
526 if (entry->skeleton.opcode == 0x0F) {
527 code_buffer_.push_back(entry->skeleton.extra_opcode1);
528 if (entry->skeleton.extra_opcode1 == 0x38 || entry->skeleton.extra_opcode2 == 0x3A) {
529 code_buffer_.push_back(entry->skeleton.extra_opcode2);
531 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
534 DCHECK_EQ(0, entry->skeleton.extra_opcode1);
535 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
541 DCHECK(strchr(entry->name, '8') == NULL) << entry->name << " " << static_cast<int>(reg)
545 uint8_t modrm = (3 << 6) | (entry->skeleton.modrm_opcode << 3) | reg;
547 DCHECK_EQ(0, entry->skeleton.ax_opcode);
548 DCHECK_EQ(0, entry->skeleton.immediate_bytes);
551 void X86Mir2Lir::EmitOpMem(const X86EncodingMap* entry, uint8_t base, int disp) {
552 if (entry->skeleton.prefix1 != 0) {
553 code_buffer_.push_back(entry->skeleton.prefix1);
554 if (entry->skeleton.prefix2 != 0) {
555 code_buffer_.push_back(entry->skeleton.prefix2);
558 DCHECK_EQ(0, entry->skeleton.prefix2);
560 code_buffer_.push_back(entry->skeleton.opcode);
561 DCHECK_EQ(0, entry->skeleton.extra_opcode1);
562 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
563 DCHECK_LT(entry->skeleton.modrm_opcode, 8);
565 uint8_t modrm = (ModrmForDisp(base, disp) << 6) | (entry->skeleton.modrm_opcode << 3) | base;
568 DCHECK_EQ(0, entry->skeleton.ax_opcode);
569 DCHECK_EQ(0, entry->skeleton.immediate_bytes);
572 void X86Mir2Lir::EmitMemReg(const X86EncodingMap* entry,
574 if (entry->skeleton.prefix1 != 0) {
575 code_buffer_.push_back(entry->skeleton.prefix1);
576 if (entry->skeleton.prefix2 != 0) {
577 code_buffer_.push_back(entry->skeleton.prefix2);
580 DCHECK_EQ(0, entry->skeleton.prefix2);
582 code_buffer_.push_back(entry->skeleton.opcode);
583 if (entry->skeleton.opcode == 0x0F) {
584 code_buffer_.push_back(entry->skeleton.extra_opcode1);
585 if (entry->skeleton.extra_opcode1 == 0x38 || entry->skeleton.extra_opcode2 == 0x3A) {
586 code_buffer_.push_back(entry->skeleton.extra_opcode2);
588 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
591 DCHECK_EQ(0, entry->skeleton.extra_opcode1);
592 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
598 DCHECK(strchr(entry->name, '8') == NULL) << entry->name << " " << static_cast<int>(reg)
610 DCHECK_EQ(0, entry->skeleton.modrm_opcode);
611 DCHECK_EQ(0, entry->skeleton.ax_opcode);
612 DCHECK_EQ(0, entry->skeleton.immediate_bytes);
615 void X86Mir2Lir::EmitRegMem(const X86EncodingMap* entry,
618 EmitMemReg(entry, base, disp, reg);
621 void X86Mir2Lir::EmitRegArray(const X86EncodingMap* entry, uint8_t reg, uint8_t base, uint8_t index,
623 if (entry->skeleton.prefix1 != 0) {
624 code_buffer_.push_back(entry->skeleton.prefix1);
625 if (entry->skeleton.prefix2 != 0) {
626 code_buffer_.push_back(entry->skeleton.prefix2);
629 DCHECK_EQ(0, entry->skeleton.prefix2);
631 code_buffer_.push_back(entry->skeleton.opcode);
632 if (entry->skeleton.opcode == 0x0F) {
633 code_buffer_.push_back(entry->skeleton.extra_opcode1);
634 if (entry->skeleton.extra_opcode1 == 0x38 || entry->skeleton.extra_opcode2 == 0x3A) {
635 code_buffer_.push_back(entry->skeleton.extra_opcode2);
637 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
640 DCHECK_EQ(0, entry->skeleton.extra_opcode1);
641 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
655 DCHECK_EQ(0, entry->skeleton.modrm_opcode);
656 DCHECK_EQ(0, entry->skeleton.ax_opcode);
657 DCHECK_EQ(0, entry->skeleton.immediate_bytes);
660 void X86Mir2Lir::EmitArrayReg(const X86EncodingMap* entry, uint8_t base, uint8_t index, int scale, int disp,
663 EmitRegArray(entry, reg, base, index, scale, disp);
666 void X86Mir2Lir::EmitRegThread(const X86EncodingMap* entry, uint8_t reg, int disp) {
667 DCHECK_NE(entry->skeleton.prefix1, 0);
668 code_buffer_.push_back(entry->skeleton.prefix1);
669 if (entry->skeleton.prefix2 != 0) {
670 code_buffer_.push_back(entry
672 code_buffer_.push_back(entry->skeleton.opcode);
673 if (entry->skeleton.opcode == 0x0F) {
674 code_buffer_.push_back(entry->skeleton.extra_opcode1);
675 if (entry->skeleton.extra_opcode1 == 0x38 || entry->skeleton.extra_opcode2 == 0x3A) {
676 code_buffer_.push_back(entry->skeleton.extra_opcode2);
678 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
681 DCHECK_EQ(0, entry->skeleton.extra_opcode1);
682 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
688 DCHECK(strchr(entry->name, '8') == NULL) << entry->name << " " << static_cast<int>(reg)
698 DCHECK_EQ(0, entry->skeleton.modrm_opcode);
699 DCHECK_EQ(0, entry->skeleton.ax_opcode);
700 DCHECK_EQ(0, entry->skeleton.immediate_bytes);
703 void X86Mir2Lir::EmitRegReg(const X86EncodingMap* entry, uint8_t reg1, uint8_t reg2) {
704 if (entry->skeleton.prefix1 != 0) {
705 code_buffer_.push_back(entry->skeleton.prefix1);
706 if (entry->skeleton.prefix2 != 0) {
707 code_buffer_.push_back(entry->skeleton.prefix2);
710 DCHECK_EQ(0, entry->skeleton.prefix2);
712 code_buffer_.push_back(entry->skeleton.opcode);
713 if (entry->skeleton.opcode == 0x0F) {
714 code_buffer_.push_back(entry->skeleton.extra_opcode1);
715 if (entry->skeleton.extra_opcode1 == 0x38 || entry->skeleton.extra_opcode2 == 0x3A) {
716 code_buffer_.push_back(entry->skeleton.extra_opcode2);
718 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
721 DCHECK_EQ(0, entry->skeleton.extra_opcode1);
722 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
734 DCHECK_EQ(0, entry->skeleton.modrm_opcode);
735 DCHECK_EQ(0, entry->skeleton.ax_opcode);
736 DCHECK_EQ(0, entry->skeleton.immediate_bytes);
739 void X86Mir2Lir::EmitRegRegImm(const X86EncodingMap* entry,
741 if (entry->skeleton.prefix1 != 0) {
742 code_buffer_.push_back(entry->skeleton.prefix1);
743 if (entry->skeleton.prefix2 != 0) {
744 code_buffer_.push_back(entry->skeleton.prefix2);
747 DCHECK_EQ(0, entry->skeleton.prefix2);
749 code_buffer_.push_back(entry->skeleton.opcode);
750 if (entry->skeleton.opcode == 0x0F) {
751 code_buffer_.push_back(entry->skeleton.extra_opcode1);
752 if (entry->skeleton.extra_opcode1 == 0x38 || entry->skeleton.extra_opcode2 == 0x3A) {
753 code_buffer_.push_back(entry->skeleton.extra_opcode2);
755 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
758 DCHECK_EQ(0, entry->skeleton.extra_opcode1);
759 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
771 DCHECK_EQ(0, entry->skeleton.modrm_opcode);
772 DCHECK_EQ(0, entry->skeleton.ax_opcode);
773 switch (entry->skeleton.immediate_bytes) {
790 LOG(FATAL) << "Unexpected immediate bytes (" << entry->skeleton.immediate_bytes
791 << ") for instruction: " << entry->name;
796 void X86Mir2Lir::EmitRegImm(const X86EncodingMap* entry, uint8_t reg, int imm) {
797 if (entry->skeleton.prefix1 != 0) {
798 code_buffer_.push_back(entry->skeleton.prefix1);
799 if (entry->skeleton.prefix2 != 0) {
800 code_buffer_.push_back(entry->skeleton.prefix2);
803 DCHECK_EQ(0, entry->skeleton.prefix2);
805 if (reg == rAX && entry->skeleton.ax_opcode != 0) {
806 code_buffer_.push_back(entry->skeleton.ax_opcode);
808 code_buffer_.push_back(entry->skeleton.opcode);
809 if (entry->skeleton.opcode == 0x0F) {
810 code_buffer_.push_back(entry->skeleton.extra_opcode1);
811 if (entry->skeleton.extra_opcode1 == 0x38 || entry->skeleton.extra_opcode2 == 0x3A) {
812 code_buffer_.push_back(entry->skeleton.extra_opcode2);
814 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
817 DCHECK_EQ(0, entry->skeleton.extra_opcode1);
818 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
823 uint8_t modrm = (3 << 6) | (entry->skeleton.modrm_opcode << 3) | reg;
826 switch (entry->skeleton.immediate_bytes) {
843 LOG(FATAL) << "Unexpected immediate bytes (" << entry->skeleton.immediate_bytes
844 << ") for instruction: " << entry->name;
849 void X86Mir2Lir::EmitThreadImm(const X86EncodingMap* entry, int disp, int imm) {
850 if (entry->skeleton.prefix1 != 0) {
851 code_buffer_.push_back(entry->skeleton.prefix1);
852 if (entry->skeleton.prefix2 != 0) {
853 code_buffer_.push_back(entry->skeleton.prefix2);
856 DCHECK_EQ(0, entry->skeleton.prefix2);
858 code_buffer_.push_back(entry->skeleton.opcode);
859 if (entry->skeleton.opcode == 0x0F) {
860 code_buffer_.push_back(entry->skeleton.extra_opcode1);
861 if (entry->skeleton.extra_opcode1 == 0x38 || entry->skeleton.extra_opcode2 == 0x3A) {
862 code_buffer_.push_back(entry->skeleton.extra_opcode2);
864 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
867 DCHECK_EQ(0, entry->skeleton.extra_opcode1);
868 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
870 uint8_t modrm = (0 << 6) | (entry->skeleton.modrm_opcode << 3) | rBP;
876 switch (entry->skeleton.immediate_bytes) {
893 LOG(FATAL) << "Unexpected immediate bytes (" << entry->skeleton.immediate_bytes
894 << ") for instruction: " << entry->name;
897 DCHECK_EQ(entry->skeleton.ax_opcode, 0);
900 void X86Mir2Lir::EmitMovRegImm(const X86EncodingMap* entry, uint8_t reg, int imm) {
909 void X86Mir2Lir::EmitShiftRegImm(const X86EncodingMap* entry, uint8_t reg, int imm) {
910 if (entry->skeleton.prefix1 != 0) {
911 code_buffer_.push_back(entry->skeleton.prefix1);
912 if (entry->skeleton.prefix2 != 0) {
913 code_buffer_.push_back(entry->skeleton.prefix2);
916 DCHECK_EQ(0, entry->skeleton.prefix2);
919 code_buffer_.push_back(entry->skeleton.opcode);
922 code_buffer_.push_back(entry->skeleton.ax_opcode);
924 if (entry->skeleton.opcode == 0x0F) {
925 code_buffer_.push_back(entry->skeleton.extra_opcode1);
926 if (entry->skeleton.extra_opcode1 == 0x38 || entry->skeleton.extra_opcode2 == 0x3A) {
927 code_buffer_.push_back(entry->skeleton.extra_opcode2);
929 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
932 DCHECK_EQ(0, entry->skeleton.extra_opcode1);
933 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
936 DCHECK(strchr(entry->name, '8') == NULL) << entry->name << " " << static_cast<int>(reg)
940 uint8_t modrm = (3 << 6) | (entry->skeleton.modrm_opcode << 3) | reg;
943 DCHECK_EQ(entry->skeleton.immediate_bytes, 1);
949 void X86Mir2Lir::EmitShiftRegCl(const X86EncodingMap* entry, uint8_t reg, uint8_t cl) {
951 if (entry->skeleton.prefix1 != 0) {
952 code_buffer_.push_back(entry->skeleton.prefix1);
953 if (entry->skeleton.prefix2 != 0) {
954 code_buffer_.push_back(entry->skeleton.prefix2);
957 DCHECK_EQ(0, entry->skeleton.prefix2);
959 code_buffer_.push_back(entry->skeleton.opcode);
960 DCHECK_EQ(0, entry->skeleton.extra_opcode1);
961 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
963 uint8_t modrm = (3 << 6) | (entry->skeleton.modrm_opcode << 3) | reg;
965 DCHECK_EQ(0, entry->skeleton.ax_opcode);
966 DCHECK_EQ(0, entry->skeleton.immediate_bytes);
969 void X86Mir2Lir::EmitRegCond(const X86EncodingMap* entry, uint8_t reg, uint8_t condition) {
970 if (entry->skeleton.prefix1 != 0) {
971 code_buffer_.push_back(entry->skeleton.prefix1);
972 if (entry->skeleton.prefix2 != 0) {
973 code_buffer_.push_back(entry->skeleton.prefix2);
976 DCHECK_EQ(0, entry->skeleton.prefix2);
978 DCHECK_EQ(0, entry->skeleton.ax_opcode);
979 DCHECK_EQ(0x0F, entry->skeleton.opcode);
981 DCHECK_EQ(0x90, entry->skeleton.extra_opcode1);
983 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
985 uint8_t modrm = (3 << 6) | (entry->skeleton.modrm_opcode << 3) | reg;
987 DCHECK_EQ(entry->skeleton.immediate_bytes, 0);
990 void X86Mir2Lir::EmitJmp(const X86EncodingMap* entry, int rel) {
991 if (entry->opcode == kX86Jmp8) {
995 } else if (entry->opcode == kX86Jmp32) {
1002 DCHECK(entry->opcode == kX86JmpR);
1003 code_buffer_.push_back(entry->skeleton.opcode);
1006 uint8_t modrm = (3 << 6) | (entry->skeleton.modrm_opcode << 3) | reg;
1011 void X86Mir2Lir::EmitJcc(const X86EncodingMap* entry, int rel, uint8_t cc) {
1013 if (entry->opcode == kX86Jcc8) {
1018 DCHECK(entry->opcode == kX86Jcc32);
1028 void X86Mir2Lir::EmitCallMem(const X86EncodingMap* entry, uint8_t base, int disp) {
1029 if (entry->skeleton.prefix1 != 0) {
1030 code_buffer_.push_back(entry->skeleton.prefix1);
1031 if (entry->skeleton.prefix2 != 0) {
1032 code_buffer_.push_back(entry->skeleton.prefix2);
1035 DCHECK_EQ(0, entry->skeleton.prefix2);
1037 code_buffer_.push_back(entry->skeleton.opcode);
1038 if (entry->skeleton.opcode == 0x0F) {
1039 code_buffer_.push_back(entry->skeleton.extra_opcode1);
1040 if (entry->skeleton.extra_opcode1 == 0x38 || entry->skeleton.extra_opcode2 == 0x3A) {
1041 code_buffer_.push_back(entry->skeleton.extra_opcode2);
1043 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
1046 DCHECK_EQ(0, entry->skeleton.extra_opcode1);
1047 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
1049 uint8_t modrm = (ModrmForDisp(base, disp) << 6) | (entry->skeleton.modrm_opcode << 3) | base;
1056 DCHECK_EQ(0, entry->skeleton.ax_opcode);
1057 DCHECK_EQ(0, entry->skeleton.immediate_bytes);
1060 void X86Mir2Lir::EmitCallThread(const X86EncodingMap* entry, int disp) {
1061 DCHECK_NE(entry->skeleton.prefix1, 0);
1062 code_buffer_.push_back(entry->skeleton.prefix1);
1063 if (entry->skeleton.prefix2 != 0) {
1064 code_buffer_.push_back(entry->skeleton.prefix2);
1066 code_buffer_.push_back(entry->skeleton.opcode);
1067 if (entry->skeleton.opcode == 0x0F) {
1068 code_buffer_.push_back(entry->skeleton.extra_opcode1);
1069 if (entry->skeleton.extra_opcode1 == 0x38 || entry->skeleton.extra_opcode2 == 0x3A) {
1070 code_buffer_.push_back(entry->skeleton.extra_opcode2);
1072 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
1075 DCHECK_EQ(0, entry->skeleton.extra_opcode1);
1076 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
1078 uint8_t modrm = (0 << 6) | (entry->skeleton.modrm_opcode << 3) | rBP;
1084 DCHECK_EQ(0, entry->skeleton.ax_opcode);
1085 DCHECK_EQ(0, entry->skeleton.immediate_bytes);
1088 void X86Mir2Lir::EmitPcRel(const X86EncodingMap* entry, uint8_t reg,
1091 if (entry->opcode == kX86PcRelLoadRA) {
1095 DCHECK(entry->opcode == kX86PcRelAdr);
1099 if (entry->skeleton.prefix1 != 0) {
1100 code_buffer_.push_back(entry->skeleton.prefix1);
1101 if (entry->skeleton.prefix2 != 0) {
1102 code_buffer_.push_back(entry->skeleton.prefix2);
1105 DCHECK_EQ(0, entry->skeleton.prefix2);
1111 if (entry->opcode == kX86PcRelLoadRA) {
1112 code_buffer_.push_back(entry->skeleton.opcode);
1113 DCHECK_EQ(0, entry->skeleton.extra_opcode1);
1114 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
1123 DCHECK_EQ(0, entry->skeleton.immediate_bytes);
1125 code_buffer_.push_back(entry->skeleton.opcode + reg);
1131 DCHECK_EQ(0, entry->skeleton.modrm_opcode);
1132 DCHECK_EQ(0, entry->skeleton.ax_opcode);
1135 void X86Mir2Lir::EmitMacro(const X86EncodingMap* entry, uint8_t reg, int offset) {
1136 DCHECK(entry->opcode == kX86StartOfMethod) << entry->name;
1149 void X86Mir2Lir::EmitUnimplemented(const X86EncodingMap* entry, LIR* lir) {
1150 UNIMPLEMENTED(WARNING) << "encoding kind for " << entry->name << " "
1151 << BuildInsnString(entry->fmt, lir, 0);
1279 const X86EncodingMap *entry = &X86Mir2Lir::EncodingMap[lir->opcode];
1281 switch (entry->kind) {
1286 DCHECK_EQ(0, entry->skeleton.prefix1);
1287 DCHECK_EQ(0, entry->skeleton.prefix2);
1288 code_buffer_.push_back(entry->skeleton.opcode);
1289 if (entry->skeleton.extra_opcode1 != 0) {
1290 code_buffer_.push_back(entry->skeleton.extra_opcode1);
1291 if (entry->skeleton.extra_opcode2 != 0) {
1292 code_buffer_.push_back(entry->skeleton.extra_opcode2);
1295 DCHECK_EQ(0, entry->skeleton.extra_opcode2);
1297 DCHECK_EQ(0, entry->skeleton.modrm_opcode);
1298 DCHECK_EQ(0, entry->skeleton.ax_opcode);
1299 DCHECK_EQ(0, entry->skeleton.immediate_bytes);
1302 EmitOpReg(entry, lir->operands[0]);
1305 EmitOpMem(entry, lir->operands[0], lir->operands[1]);
1308 EmitMemReg(entry, lir->operands[0], lir->operands[1], lir->operands[2]);
1311 EmitArrayReg(entry, lir->operands[0], lir->operands[1], lir->operands[2],
1315 EmitRegMem(entry, lir->operands[0], lir->operands[1], lir->operands[2]);
1318 EmitRegArray(entry, lir->operands[0], lir->operands[1], lir->operands[2],
1322 EmitRegThread(entry, lir->operands[0], lir->operands[1]);
1325 EmitRegReg(entry, lir->operands[0], lir->operands[1]);
1328 EmitRegReg(entry, lir->operands[1], lir->operands[0]);
1331 EmitRegRegImm(entry, lir->operands[0], lir->operands[1], lir->operands[2]);
1334 EmitRegImm(entry, lir->operands[0], lir->operands[1]);
1337 EmitThreadImm(entry, lir->operands[0], lir->operands[1]);
1340 EmitMovRegImm(entry, lir->operands[0], lir->operands[1]);
1343 EmitShiftRegImm(entry, lir->operands[0], lir->operands[1]);
1346 EmitShiftRegCl(entry, lir->operands[0], lir->operands[1]);
1349 EmitRegCond(entry, lir->operands[0], lir->operands[1]);
1352 EmitJmp(entry, lir->operands[0]);
1355 EmitJcc(entry, lir->operands[0], lir->operands[1]);
1358 switch (entry->opcode) {
1360 EmitCallMem(entry, lir->operands[0], lir->operands[1]);
1363 EmitCallThread(entry, lir->operands[0]);
1366 EmitUnimplemented(entry, lir);
1371 EmitPcRel(entry, lir->operands[0], lir->operands[1], lir->operands[2],
1375 EmitMacro(entry, lir->operands[0], lir->offset);
1378 EmitUnimplemented(entry, lir);
1383 << "Instruction size mismatch for entry: " << X86Mir2Lir::EncodingMap[lir->opcode].name;
