Lines Matching refs:Bit
145 BIC = 14, // Bit Clear
254 // Read one particular bit out of the instruction bits.
255 inline int Bit(int nr) const {
259 // Read a bit field out of the instruction bits.
289 inline int RegShiftField() const { return Bit(4); }
301 inline int BField() const { return Bit(22); }
302 inline int WField() const { return Bit(21); }
303 inline int LField() const { return Bit(20); }
311 inline int SignField() const { return Bit(6); }
312 inline int HField() const { return Bit(5); }
328 // Field used in 16-bit immediate move instructions
335 uint32_t imm32 = (Bit(19) << 31) | (((1 << 5) - Bit(18)) << 25) |
342 uint64_t imm64 = (Bit(19)*(1LL << 63)) | (((1LL << 8) - Bit(18)) << 54) |
354 ((Bit(25) == 1) || // Data processing immediate.
355 (Bit(4) == 0) || // Data processing register.
356 (Bit(7) == 0)); // Data processing register-shifted register.
364 return ((Bit(25) == 0) && ((Bits(20, 5) & 0x19) == 0x10) && (Bit(7) == 0));
368 return ((Bit(25) == 0) && (Bits(4, 4) == 9));
383 return static_cast<SRegister>((Bits(kRnShift, kRnBits) << 1) + Bit(7));
386 return static_cast<SRegister>((Bits(kRdShift, kRdBits) << 1) + Bit(22));
389 return static_cast<SRegister>((Bits(kRmShift, kRmBits) << 1) + Bit(5));
392 return static_cast<DRegister>(Bits(kRnShift, kRnBits) + (Bit(7) << 4));
395 return static_cast<DRegister>(Bits(kRdShift, kRdBits) + (Bit(22) << 4));
398 return static_cast<DRegister>(Bits(kRmShift, kRmBits) + (Bit(5) << 4));
405 return ((Bit(24) == 0) && (Bits(9, 3) == 5));
406 // Bit(4) == 0: Data Processing
407 // Bit(4) == 1: 8, 16, or 32-bit Transfer between ARM Core and VFP
410 // Test for VFP 64-bit transfer instructions of type 6.
