Lines Matching refs:Rd
208 // Rd is unused (and not shown), and we don't show the 's' suffix either.
355 ArmRegister Rd(instr, 8);
357 args << Rd << ", " << Rt << ", [" << Rn << ", #" << (imm8 << 2) << "]";
370 // |111|0101| op3|S| Rn |imm3| Rd |i2|ty| Rm |
377 ArmRegister Rd(instr, 8);
382 if (Rd.r != 0xF) {
410 if (Rd.r != 0xF) {
423 if (Rd.r != 0xF) {
437 if (Rd.r != 0xF) {
457 if (Rd.r != 0xF) {
458 args << Rd << ", ";
608 // |111|10|i0| op3|S| Rn |0|iii| Rd |iiiiiiii|
615 ArmRegister Rd(instr, 8);
631 args << Rd << ", ThumbExpand(" << imm32 << ")";
632 } else if (Rd.r == 0xF && S == 1 &&
661 args << Rd << ", " << Rn << ", ThumbExpand(" << imm32 << ")";
675 // ADD/SUB.W Rd, Rn #imm12 - 111 10 i1 0101 0 nnnn 0 iii dddd iiiiiiii
676 ArmRegister Rd(instr, 8);
684 args << Rd << ", " << Rn << ", #" << imm12;
687 args << Rd << ", ";
693 // MOVW/T Rd, #imm16 - 111 10 i0 0010 0 iiii 0 iii dddd iiiiiiii
694 ArmRegister Rd(instr, 8);
701 args << Rd << ", #" << imm16;
705 // BFI Rd, Rn, #lsb, #width - 111 10 0 11 011 0 nnnn 0 iii dddd ii 0 iiiii
706 ArmRegister Rd(instr, 8);
715 args << Rd << ", " << Rn << ", #" << lsb << ", #" << width;
718 args << Rd << ", #" << lsb << ", #" << width;
1059 ThumbRegister Rd(instr, 0);
1067 args << Rd << ", " << rm << ", #" << imm5;
1077 ThumbRegister Rd(instr, 0);
1087 args << Rd << ", " << Rn;
1100 // MOVS Rd, #imm8 - 00100 ddd iiiiiiii
1233 ThumbRegister rd(instr, 8);
1236 args << rd << ", sp, #" << (imm8 << 2);
