Lines Matching full:cunit
47 static int genTraceProfileEntry(CompilationUnit *cUnit)
51 newLIR1(cUnit, kArm16BitData, addr & 0xffff);
52 newLIR1(cUnit, kArm16BitData, (addr >> 16) & 0xffff);
53 cUnit->chainCellOffsetLIR =
54 (LIR *) newLIR1(cUnit, kArm16BitData, CHAIN_CELL_OFFSET_TAG);
55 cUnit->headerSize = 6;
59 newLIR2(cUnit, kThumb2LdrPcReln12, r0, 8);
60 newLIR3(cUnit, kThumbLdrRRI5, r1, r0, 0);
61 newLIR2(cUnit, kThumbAddRI8, r1, 1);
62 newLIR3(cUnit, kThumbStrRRI5, r1, r0, 0);
66 newLIR2(cUnit, kThumbBlx1,
69 newLIR2(cUnit, kThumbBlx2,
76 static void genNegFloat(CompilationUnit *cUnit, RegLocation rlDest,
80 rlSrc = loadValue(cUnit, rlSrc, kFPReg);
81 rlResult = dvmCompilerEvalLoc(cUnit, rlDest, kFPReg, true);
82 newLIR2(cUnit, kThumb2Vnegs, rlResult.lowReg, rlSrc.lowReg);
83 storeValue(cUnit, rlDest, rlResult);
86 static void genNegDouble(CompilationUnit *cUnit, RegLocation rlDest,
90 rlSrc = loadValueWide(cUnit, rlSrc, kFPReg);
91 rlResult = dvmCompilerEvalLoc(cUnit, rlDest, kFPReg, true);
92 newLIR2(cUnit, kThumb2Vnegd, S2D(rlResult.lowReg, rlResult.highReg),
94 storeValueWide(cUnit, rlDest, rlResult);
102 static void genMulLong(CompilationUnit *cUnit, RegLocation rlDest,
106 int resLo = dvmCompilerAllocTemp(cUnit);
107 int resHi = dvmCompilerAllocTemp(cUnit);
108 int tmp1 = dvmCompilerAllocTemp(cUnit);
110 rlSrc1 = loadValueWide(cUnit, rlSrc1, kCoreReg);
111 rlSrc2 = loadValueWide(cUnit, rlSrc2, kCoreReg);
113 newLIR3(cUnit, kThumb2MulRRR, tmp1, rlSrc2.lowReg, rlSrc1.highReg);
114 newLIR4(cUnit, kThumb2Umull, resLo, resHi, rlSrc2.lowReg, rlSrc1.lowReg);
115 newLIR4(cUnit, kThumb2Mla, tmp1, rlSrc1.lowReg, rlSrc2.highReg, tmp1);
116 newLIR4(cUnit, kThumb2AddRRR, resHi, tmp1, resHi, 0);
117 dvmCompilerFreeTemp(cUnit, tmp1);
119 rlResult = dvmCompilerGetReturnWide(cUnit); // Just as a template, will patch
122 storeValueWide(cUnit, rlDest, rlResult);
125 static void genLong3Addr(CompilationUnit *cUnit, MIR *mir, OpKind firstOp,
130 rlSrc1 = loadValueWide(cUnit, rlSrc1, kCoreReg);
131 rlSrc2 = loadValueWide(cUnit, rlSrc2, kCoreReg);
132 rlResult = dvmCompilerEvalLoc(cUnit, rlDest, kCoreReg, true);
133 opRegRegReg(cUnit, firstOp, rlResult.lowReg, rlSrc1.lowReg, rlSrc2.lowReg);
134 opRegRegReg(cUnit, secondOp, rlResult.highReg, rlSrc1.highReg,
136 storeValueWide(cUnit, rlDest, rlResult);
139 void dvmCompilerInitializeRegAlloc(CompilationUnit *cUnit)
144 cUnit->regPool = pool;
147 dvmCompilerNew(numTemps * sizeof(*cUnit->regPool->coreTemps), true);
150 dvmCompilerNew(numFPTemps * sizeof(*cUnit->regPool->FPTemps), true);
154 dvmCompilerAllocBitVector(cUnit->numSSARegs, false);
167 static ArmLIR *genIT(CompilationUnit *cUnit, ArmConditionCode code,
190 dvmCompilerAbort(cUnit);
194 return newLIR2(cUnit, kThumb2It, code, mask);
198 static ArmLIR *genExportPC(CompilationUnit *cUnit, MIR *mir)
202 int rDPC = dvmCompilerAllocTemp(cUnit);
203 res = loadConstant(cUnit, rDPC, (int) (cUnit->method->insns + mir->offset));
204 newLIR3(cUnit, kThumb2StrRRI8Predec, rDPC, r5FP,
206 dvmCompilerFreeTemp(cUnit, rDPC);
237 static void genMonitorEnter(CompilationUnit *cUnit, MIR *mir)
239 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
246 loadValueDirectFixed(cUnit, rlSrc, r1); // Get obj
247 dvmCompilerLockAllTemps(cUnit); // Prepare for explicit register usage
248 dvmCompilerFreeTemp(cUnit, r4PC); // Free up r4 for general use
249 genNullCheck(cUnit, rlSrc.sRegLow, r1, mir->offset, NULL);
250 loadWordDisp(cUnit, r6SELF, offsetof(Thread, threadId), r3); // Get threadId
251 newLIR3(cUnit, kThumb2Ldrex, r2, r1,
253 opRegImm(cUnit, kOpLsl, r3, LW_LOCK_OWNER_SHIFT); // Align owner
255 newLIR4(cUnit, kThumb2Bfi, r3, r2, 0, LW_LOCK_OWNER_SHIFT - 1);
256 newLIR3(cUnit, kThumb2Bfc, r2, LW_HASH_STATE_SHIFT,
258 hopBranch = newLIR2(cUnit, kThumb2Cbnz, r2, 0);
259 newLIR4(cUnit, kThumb2Strex, r2, r3, r1, offsetof(Object, lock) >> 2);
260 dvmCompilerGenMemBarrier(cUnit, kSY);
261 branch = newLIR2(cUnit, kThumb2Cbz, r2, 0);
263 hopTarget = newLIR0(cUnit, kArmPseudoTargetLabel);
268 loadConstant(cUnit, r3, (int) (cUnit->method->insns + mir->offset));
271 loadConstant(cUnit, r4PC, (int)(cUnit->method->insns + mir->offset +
274 newLIR3(cUnit, kThumb2StrRRI8Predec, r3, r5FP,
278 genRegCopy(cUnit, r0, r6SELF);
279 genDispatchToHandler(cUnit, TEMPLATE_MONITOR_ENTER);
281 target = newLIR0(cUnit, kArmPseudoTargetLabel);
292 static void genMonitorExit(CompilationUnit *cUnit, MIR *mir)
294 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
301 loadValueDirectFixed(cUnit, rlSrc, r1); // Get obj
302 dvmCompilerLockAllTemps(cUnit); // Prepare for explicit register usage
303 dvmCompilerFreeTemp(cUnit, r4PC); // Free up r4 for general use
304 genNullCheck(cUnit, rlSrc.sRegLow, r1, mir->offset, NULL);
305 loadWordDisp(cUnit, r1, offsetof(Object, lock), r2); // Get object->lock
306 loadWordDisp(cUnit, r6SELF, offsetof(Thread, threadId), r3); // Get threadId
308 opRegRegImm(cUnit, kOpAnd, r7, r2,
310 opRegImm(cUnit, kOpLsl, r3, LW_LOCK_OWNER_SHIFT); // Align owner
311 newLIR3(cUnit, kThumb2Bfc, r2, LW_HASH_STATE_SHIFT,
313 opRegReg(cUnit, kOpSub, r2, r3);
314 hopBranch = opCondBranch(cUnit, kArmCondNe);
315 dvmCompilerGenMemBarrier(cUnit, kSY);
316 storeWordDisp(cUnit, r1, offsetof(Object, lock), r7);
317 branch = opNone(cUnit, kOpUncondBr);
319 hopTarget = newLIR0(cUnit, kArmPseudoTargetLabel);
324 loadConstant(cUnit, r3, (int) (cUnit->method->insns + mir->offset));
326 LOAD_FUNC_ADDR(cUnit, r7, (int)dvmUnlockObject);
327 genRegCopy(cUnit, r0, r6SELF);
329 newLIR3(cUnit, kThumb2StrRRI8Predec, r3, r5FP,
332 opReg(cUnit, kOpBlx, r7);
334 ArmLIR *branchOver = genCmpImmBranch(cUnit, kArmCondNe, r0, 0);
335 loadConstant(cUnit, r0,
336 (int) (cUnit->method->insns + mir->offset +
338 genDispatchToHandler(cUnit, TEMPLATE_THROW_EXCEPTION_COMMON);
341 target = newLIR0(cUnit, kArmPseudoTargetLabel);
347 static void genMonitor(CompilationUnit *cUnit, MIR *mir)
350 genMonitorEnter(cUnit, mir);
352 genMonitorExit(cUnit, mir);
370 static void genCmpLong(CompilationUnit *cUnit, MIR *mir,
377 rlSrc1 = loadValueWide(cUnit, rlSrc1, kCoreReg);
378 rlSrc2 = loadValueWide(cUnit, rlSrc2, kCoreReg);
379 rlTemp.lowReg = dvmCompilerAllocTemp(cUnit);
380 loadConstant(cUnit, rlTemp.lowReg, -1);
381 opRegReg(cUnit, kOpCmp, rlSrc1.highReg, rlSrc2.highReg);
382 ArmLIR *branch1 = opCondBranch(cUnit, kArmCondLt);
383 ArmLIR *branch2 = opCondBranch(cUnit, kArmCondGt);
384 opRegRegReg(cUnit, kOpSub, rlTemp.lowReg, rlSrc1.lowReg, rlSrc2.lowReg);
385 ArmLIR *branch3 = opCondBranch(cUnit, kArmCondEq);
387 genIT(cUnit, kArmCondHi, "E");
388 newLIR2(cUnit, kThumb2MovImmShift, rlTemp.lowReg, modifiedImmediate(-1));
389 loadConstant(cUnit, rlTemp.lowReg, 1);
390 genBarrier(cUnit);
392 target2 = newLIR0(cUnit, kArmPseudoTargetLabel);
394 opRegReg(cUnit, kOpNeg, rlTemp.lowReg, rlTemp.lowReg);
396 target1 = newLIR0(cUnit, kArmPseudoTargetLabel);
399 storeValue(cUnit, rlDest, rlTemp);
406 static bool genInlinedAbsFloat(CompilationUnit *cUnit, MIR *mir)
408 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
409 RegLocation rlDest = inlinedTarget(cUnit, mir, true);
410 rlSrc = loadValue(cUnit, rlSrc, kFPReg);
411 RegLocation rlResult = dvmCompilerEvalLoc(cUnit, rlDest, kFPReg, true);
412 newLIR2(cUnit, kThumb2Vabss, rlResult.lowReg, rlSrc.lowReg);
413 storeValue(cUnit, rlDest, rlResult);
417 static bool genInlinedAbsDouble(CompilationUnit *cUnit, MIR *mir)
419 RegLocation rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
420 RegLocation rlDest = inlinedTargetWide(cUnit, mir, true);
421 rlSrc = loadValueWide(cUnit, rlSrc, kFPReg);
422 RegLocation rlResult = dvmCompilerEvalLoc(cUnit, rlDest, kFPReg, true);
423 newLIR2(cUnit, kThumb2Vabsd, S2D(rlResult.lowReg, rlResult.highReg),
425 storeValueWide(cUnit, rlDest, rlResult);
429 static bool genInlinedMinMaxInt(CompilationUnit *cUnit, MIR *mir, bool isMin)
431 RegLocation rlSrc1 = dvmCompilerGetSrc(cUnit, mir, 0);
432 RegLocation rlSrc2 = dvmCompilerGetSrc(cUnit, mir, 1);
433 rlSrc1 = loadValue(cUnit, rlSrc1, kCoreReg);
434 rlSrc2 = loadValue(cUnit, rlSrc2, kCoreReg);
435 RegLocation rlDest = inlinedTarget(cUnit, mir, false);
436 RegLocation rlResult = dvmCompilerEvalLoc(cUnit, rlDest, kCoreReg, true);
437 opRegReg(cUnit, kOpCmp, rlSrc1.lowReg, rlSrc2.lowReg);
438 genIT(cUnit, (isMin) ? kArmCondGt : kArmCondLt, "E");
439 opRegReg(cUnit, kOpMov, rlResult.lowReg, rlSrc2.lowReg);
440 opRegReg(cUnit, kOpMov, rlResult.lowReg, rlSrc1.lowReg);
441 genBarrier(cUnit);
442 storeValue(cUnit, rlDest, rlResult);
446 static void genMultiplyByTwoBitMultiplier(CompilationUnit *cUnit,
450 opRegRegRegShift(cUnit, kOpAdd, rlResult.lowReg, rlSrc.lowReg, rlSrc.lowReg,
453 opRegRegImm(cUnit, kOpLsl, rlResult.lowReg, rlResult.lowReg, firstBit);
457 static void genMultiplyByShiftAndReverseSubtract(CompilationUnit *cUnit,
460 newLIR4(cUnit, kThumb2RsbRRR, rlResult.lowReg, rlSrc.lowReg, rlSrc.lowReg,
