Lines Matching refs:instructions
63 // can be defined to enable ARMv7 and VFPv3 instructions when building the
298 void RelocInfo::PatchCode(byte* instructions, int instruction_count) {
299 // Patch the code at the current address with the supplied instructions.
301 Instr* instr = reinterpret_cast<Instr*>(instructions);
312 // Additional guard instructions can be added if required.
457 // Specific instructions, constants, and masks.
499 // A mask for the Rd register for push, pop, ldr, str instructions.
885 // Keep track of the last bound label so we don't eliminate any instructions
1016 // instructions - either mov or ldr. The mov might actually be two
1017 // instructions mov or movw followed by movt so including the actual
1018 // instruction two or three instructions will be generated.
1247 // Branch instructions.
1294 // Data-processing instructions.
1381 // Don't allow nop instructions in the form mov rn, rn to be generated using
1383 // or MarkCode(int/NopMarkerTypes) pseudo instructions.
1414 // Multiply instructions.
1500 // Miscellaneous arithmetic instructions.
1509 // Saturating instructions.
1533 // Bitfield manipulation instructions.
1710 // Status register access instructions.
1742 // Load/Store instructions.
1808 // Preload instructions.
1827 // Load/Store multiple instructions.
1857 // Exception-generating instructions and debugging support.
1899 // Coprocessor instructions.
2951 // Pseudo instructions.
3169 void Assembler::BlockConstPoolFor(int instructions) {
3170 int pc_limit = pc_offset() + instructions * kInstrSize;
