Lines Matching refs:Instr
216 Instr* pc = reinterpret_cast<Instr*>(pc_);
217 Instr* instr = reinterpret_cast<Instr*>(instructions);
219 *(pc + i) = *(instr + i);
270 const Instr kPopInstruction = ADDIU | (kRegister_sp_Code << kRsShift)
273 const Instr kPushInstruction = ADDIU | (kRegister_sp_Code << kRsShift)
276 const Instr kPushRegPattern = SW | (kRegister_sp_Code << kRsShift)
279 const Instr kPopRegPattern = LW | (kRegister_sp_Code << kRsShift)
282 const Instr kLwRegFpOffsetPattern = LW | (kRegister_fp_Code << kRsShift)
285 const Instr kSwRegFpOffsetPattern = SW | (kRegister_fp_Code << kRsShift)
288 const Instr kLwRegFpNegOffsetPattern = LW | (kRegister_fp_Code << kRsShift)
291 const Instr kSwRegFpNegOffsetPattern = SW | (kRegister_fp_Code << kRsShift)
294 const Instr kRtMask = kRtFieldMask;
295 const Instr kLwSwInstrTypeMask = 0xffe00000;
296 const Instr kLwSwInstrArgumentMask = ~kLwSwInstrTypeMask;
297 const Instr kLwSwOffsetMask = kImm16Mask;
348 Register Assembler::GetRtReg(Instr instr) {
350 rt.code_ = (instr & kRtFieldMask) >> kRtShift;
355 Register Assembler::GetRsReg(Instr instr) {
357 rs.code_ = (instr & kRsFieldMask) >> kRsShift;
362 Register Assembler::GetRdReg(Instr instr) {
364 rd.code_ = (instr & kRdFieldMask) >> kRdShift;
369 uint32_t Assembler::GetRt(Instr instr) {
370 return (instr & kRtFieldMask) >> kRtShift;
374 uint32_t Assembler::GetRtField(Instr instr) {
375 return instr & kRtFieldMask;
379 uint32_t Assembler::GetRs(Instr instr) {
380 return (instr & kRsFieldMask) >> kRsShift;
384 uint32_t Assembler::GetRsField(Instr instr) {
385 return instr & kRsFieldMask;
389 uint32_t Assembler::GetRd(Instr instr) {
390 return (instr & kRdFieldMask) >> kRdShift;
394 uint32_t Assembler::GetRdField(Instr instr) {
395 return instr & kRdFieldMask;
399 uint32_t Assembler::GetSa(Instr instr) {
400 return (instr & kSaFieldMask) >> kSaShift;
404 uint32_t Assembler::GetSaField(Instr instr) {
405 return instr & kSaFieldMask;
409 uint32_t Assembler::GetOpcodeField(Instr instr) {
410 return instr & kOpcodeMask;
414 uint32_t Assembler::GetFunction(Instr instr) {
415 return (instr & kFunctionFieldMask) >> kFunctionShift;
419 uint32_t Assembler::GetFunctionField(Instr instr) {
420 return instr & kFunctionFieldMask;
424 uint32_t Assembler::GetImmediate16(Instr instr) {
425 return instr & kImm16Mask;
429 uint32_t Assembler::GetLabelConst(Instr instr) {
430 return instr & ~kImm16Mask;
434 bool Assembler::IsPop(Instr instr) {
435 return (instr & ~kRtMask) == kPopRegPattern;
439 bool Assembler::IsPush(Instr instr) {
440 return (instr & ~kRtMask) == kPushRegPattern;
444 bool Assembler::IsSwRegFpOffset(Instr instr) {
445 return ((instr & kLwSwInstrTypeMask) == kSwRegFpOffsetPattern);
449 bool Assembler::IsLwRegFpOffset(Instr instr) {
450 return ((instr & kLwSwInstrTypeMask) == kLwRegFpOffsetPattern);
454 bool Assembler::IsSwRegFpNegOffset(Instr instr) {
455 return ((instr & (kLwSwInstrTypeMask | kNegOffset)) ==
460 bool Assembler::IsLwRegFpNegOffset(Instr instr) {
461 return ((instr & (kLwSwInstrTypeMask | kNegOffset)) ==
486 bool Assembler::IsBranch(Instr instr) {
487 uint32_t opcode = GetOpcodeField(instr);
488 uint32_t rt_field = GetRtField(instr);
489 uint32_t rs_field = GetRsField(instr);
505 bool Assembler::IsEmittedConstant(Instr instr) {
506 uint32_t label_constant = GetLabelConst(instr);
511 bool Assembler::IsBeq(Instr instr) {
512 return GetOpcodeField(instr) == BEQ;
516 bool Assembler::IsBne(Instr instr) {
517 return GetOpcodeField(instr) == BNE;
521 bool Assembler::IsJump(Instr instr) {
522 uint32_t opcode = GetOpcodeField(instr);
523 uint32_t rt_field = GetRtField(instr);
524 uint32_t rd_field = GetRdField(instr);
525 uint32_t function_field = GetFunctionField(instr);
533 bool Assembler::IsJ(Instr instr) {
534 uint32_t opcode = GetOpcodeField(instr);
540 bool Assembler::IsJal(Instr instr) {
541 return GetOpcodeField(instr) == JAL;
545 bool Assembler::IsJr(Instr instr) {
546 return GetOpcodeField(instr) == SPECIAL && GetFunctionField(instr) == JR;
550 bool Assembler::IsJalr(Instr instr) {
551 return GetOpcodeField(instr) == SPECIAL && GetFunctionField(instr) == JALR;
555 bool Assembler::IsLui(Instr instr) {
556 uint32_t opcode = GetOpcodeField(instr);
562 bool Assembler::IsOri(Instr instr) {
563 uint32_t opcode = GetOpcodeField(instr);
569 bool Assembler::IsNop(Instr instr, unsigned int type) {
572 uint32_t opcode = GetOpcodeField(instr);
573 uint32_t function = GetFunctionField(instr);
574 uint32_t rt = GetRt(instr);
575 uint32_t rd = GetRd(instr);
576 uint32_t sa = GetSa(instr);
593 int32_t Assembler::GetBranchOffset(Instr instr) {
594 instr));
595 return (static_cast<int16_t>(instr & kImm16Mask)) << 2;
599 bool Assembler::IsLw(Instr instr) {
600 return ((instr & kOpcodeMask) == LW);
604 int16_t Assembler::GetLwOffset(Instr instr) {
605 ASSERT(IsLw(instr));
606 return ((instr & kImm16Mask));
610 Instr Assembler::SetLwOffset(Instr instr, int16_t offset) {
611 ASSERT(IsLw(instr));
614 Instr temp_instr = LW | (instr & kRsFieldMask) | (instr & kRtFieldMask)
621 bool Assembler::IsSw(Instr instr) {
622 return ((instr & kOpcodeMask) == SW);
626 Instr Assembler::SetSwOffset(Instr instr, int16_t offset) {
627 ASSERT(IsSw(instr));
628 return ((instr & ~kImm16Mask) | (offset & kImm16Mask));
632 bool Assembler::IsAddImmediate(Instr instr) {
633 return ((instr & kOpcodeMask) == ADDIU);
637 Instr Assembler::SetAddImmediateOffset(Instr instr, int16_t offset) {
638 ASSERT(IsAddImmediate(instr));
639 return ((instr & ~kImm16Mask) | (offset & kImm16Mask));
643 bool Assembler::IsAndImmediate(Instr instr) {
644 return GetOpcodeField(instr) == ANDI;
649 Instr instr = instr_at(pos);
650 if ((instr & ~kImm16Mask) == 0) {
652 if (instr == 0) {
655 int32_t imm18 =((instr & static_cast<int32_t>(kImm16Mask)) << 16) >> 14;
660 ASSERT(IsBranch(instr) || IsJ(instr) || IsLui(instr));
663 if (IsBranch(instr)) {
664 int32_t imm18 = ((instr & static_cast<int32_t>(kImm16Mask)) << 16) >> 14;
672 } else if (IsLui(instr)) {
673 Instr instr_lui = instr_at(pos + 0 * Assembler::kInstrSize);
674 Instr instr_ori = instr_at(pos + 1 * Assembler::kInstrSize);
689 int32_t imm28 = (instr & static_cast<int32_t>(kImm26Mask)) << 2;
705 Instr instr = instr_at(pos);
706 if ((instr & ~kImm16Mask) == 0) {
714 ASSERT(IsBranch(instr) || IsJ(instr) || IsLui(instr));
715 if (IsBranch(instr)) {
719 instr &= ~kImm16Mask;
723 instr_at_put(pos, instr | (imm16 & kImm16Mask));
724 } else if (IsLui(instr)) {
725 Instr instr_lui = instr_at(pos + 0 * Assembler::kInstrSize);
726 Instr instr_ori = instr_at(pos + 1 * Assembler::kInstrSize);
743 instr &= ~kImm26Mask;
747 instr_at_put(pos, instr | (imm26 & kImm26Mask));
762 Instr instr = instr_at(l.pos());
763 if ((instr & ~kImm16Mask) == 0) {
766 PrintF("%d\n", instr);
788 Instr instr = instr_at(fixup_pos);
789 if (IsBranch(instr)) {
802 ASSERT(IsJ(instr) || IsLui(instr) || IsEmittedConstant(instr));
856 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift)
858 emit(instr);
869 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift)
871 emit(instr);
882 Instr instr = opcode | fmt | (ft.code() << kFtShift) | (fs.code() << kFsShift)
884 emit(instr);
895 Instr instr = opcode | (fr.code() << kFrShift) | (ft.code() << kFtShift)
897 emit(instr);
908 Instr instr = opcode | fmt | (rt.code() << kRtShift)
910 emit(instr);
920 Instr instr =
922 emit(instr);
933 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift)
935 emit(instr);
944 Instr instr = opcode | (rs.code() << kRsShift) | SF | (j & kImm16Mask);
945 emit(instr);
954 Instr instr = opcode | (rs.code() << kRsShift) | (ft.code() << kFtShift)
956 emit(instr);
964 Instr instr = opcode | address;
965 emit(instr);
1329 Instr instr = SPECIAL | (1 << kRsShift) | (rt.code() << kRtShift)
1331 emit(instr);
1339 Instr instr = SPECIAL | (rs.code() << kRsShift) | (rt.code() << kRtShift)
1341 emit(instr);
1476 Instr break_instr = SPECIAL | BREAK | (code << 6);
1491 emit(reinterpret_cast<Instr>(msg));
1498 Instr instr = SPECIAL | TGE | rs.code() << kRsShift
1500 emit(instr);
1506 Instr instr = SPECIAL | TGEU | rs.code() << kRsShift
1508 emit(instr);
1514 Instr instr =
1516 emit(instr);
1522 Instr instr =
1525 emit(instr);
1531 Instr instr =
1533 emit(instr);
1539 Instr instr =
1541 emit(instr);
1605 // Clz instr requires same GPR number in 'rd' and 'rt' fields.
1612 // Ins instr has 'rt' field as dest, and two uint5: msb, lsb.
1620 // Ext instr has 'rt' field as dest, and two uint5: msb, lsb.
1879 Instr instr = COP1 | fmt | ft.code() << 16 | fs.code() << kFsShift
1881 emit(instr);
1896 Instr instr = COP1 | BC1 | cc << 18 | 0 << 16 | (offset & kImm16Mask);
1897 emit(instr);
1903 Instr instr = COP1 | BC1 | cc << 18 | 1 << 16 | (offset & kImm16Mask);
1904 emit(instr);
1932 Instr instr = instr_at(pc);
1933 ASSERT(IsJ(instr) || IsLui(instr));
1934 if (IsLui(instr)) {
1935 Instr instr_lui = instr_at(pc + 0 * Assembler::kInstrSize);
1936 Instr instr_ori = instr_at(pc + 1 * Assembler::kInstrSize);
1955 uint32_t imm28 = (instr & static_cast<int32_t>(kImm26Mask)) << 2;
1963 instr &= ~kImm26Mask;
1967 instr_at_put(pc, instr | (imm26 & kImm26Mask));
2139 Instr instr1 = instr_at(pc);
2140 Instr instr2 = instr_at(pc + kInstrSize);
2165 // Patching the address must replace both instr, and flush the i-cache.
2171 Instr instr2 = instr_at(pc + kInstrSize);
2177 // Check we have the result from a li macro-instruction, using instr pair.
2178 Instr instr1 = instr_at(pc);
2204 Instr instr3 = instr_at(pc + 2 * kInstrSize);
2274 Instr instr1 = instr_at(pc);
2276 Instr instr2 = instr_at(pc + 1 * kInstrSize);
2277 Instr instr3 = instr_at(pc + 2 * kInstrSize);
