Lines Matching full:__v8si
49 return (__m256i)__builtin_ia32_pabsd256((__v8si)__a);
61 return (__m256i)__builtin_ia32_packssdw256((__v8si)__a, (__v8si)__b);
73 return (__m256i) __builtin_ia32_packusdw256((__v8si)__V1, (__v8si)__V2);
91 return (__m256i)((__v8si)__a + (__v8si)__b);
180 return (__m256i)((__v8si)__a == (__v8si)__b);
204 return (__m256i)((__v8si)__a > (__v8si)__b);
222 return (__m256i)__builtin_ia32_phaddd256((__v8si)__a, (__v8si)__b);
240 return (__m256i)__builtin_ia32_phsubd256((__v8si)__a, (__v8si)__b);
276 return (__m256i)__builtin_ia32_pmaxsd256((__v8si)__a, (__v8si)__b);
294 return (__m256i)__builtin_ia32_pmaxud256((__v8si)__a, (__v8si)__b);
312 return (__m256i)__builtin_ia32_pminsd256((__v8si)__a, (__v8si)__b);
330 return (__m256i)__builtin_ia32_pminud256((__v8si)__a, (__v8si)__b);
414 return (__m256i)__builtin_ia32_pmuldq256((__v8si)__a, (__v8si)__b);
444 return (__m256i)((__v8si)__a * (__v8si)__b);
450 return __builtin_ia32_pmuludq256((__v8si)__a, (__v8si)__b);
473 (__m256i)__builtin_shufflevector((__v8si)__a, (__v8si)_mm256_set1_epi32(0), \
522 return (__m256i)__builtin_ia32_psignd256((__v8si)__a, (__v8si)__b);
544 return (__m256i)__builtin_ia32_pslldi256((__v8si)__a, __count);
550 return (__m256i)__builtin_ia32_pslld256((__v8si)__a, (__v4si)__count);
580 return (__m256i)__builtin_ia32_psradi256((__v8si)__a, __count);
586 return (__m256i)__builtin_ia32_psrad256((__v8si)__a, (__v4si)__count);
608 return (__m256i)__builtin_ia32_psrldi256((__v8si)__a, __count);
614 return (__m256i)__builtin_ia32_psrld256((__v8si)__a, (__v4si)__count);
644 return (__m256i)((__v8si)__a - (__v8si)__b);
692 return (__m256i)__builtin_shufflevector((__v8si)__a, (__v8si)__b, 2, 8+2, 3, 8+3, 6, 8+6, 7, 8+7);
716 return (__m256i)__builtin_shufflevector((__v8si)__a, (__v8si)__b, 0, 8+0, 1, 8+1, 4, 8+4, 5, 8+5);
769 (__m256i)__builtin_ia32_pblendd256((__v8si)__V1, (__v8si)__V2, (M)); })
823 return (__m256i)__builtin_ia32_permvarsi256((__v8si)__a, (__v8si)__b);
861 return (__m256i)__builtin_ia32_maskloadd256((const __v8si *)__X, (__v8si)__M);
885 __builtin_ia32_maskstored256((__v8si *)__X, (__v8si)__M, (__v8si)__Y);
909 return (__m256i)__builtin_ia32_psllv8si((__v8si)__X, (__v8si)__Y);
933 return (__m256i)__builtin_ia32_psrav8si((__v8si)__X, (__v8si)__Y);
945 return (__m256i)__builtin_ia32_psrlv8si((__v8si)__X, (__v8si)__Y);
1012 (__v8si)__i, (__v8sf)__mask, (s)); })
1043 (__m256i)__builtin_ia32_gatherd_d256((__v8si)__a, (const __v8si *)__m, \
1044 (__v8si)__i, (__v8si)__mask, (s)); })
1133 (const __v8sf *)__m, (__v8si)__i, \
1160 (__m256i)__builtin_ia32_gatherd_d256((__v8si)_mm256_setzero_si256(), \
1161 (const __v8si *)__m, (__v8si)__i, \
1162 (__v8si)_mm256_set1_epi32(-1), (s)); })
