Lines Matching full:a64_a
23 a64 a64_r, a64_a, a64_b;
49 a64_a = 0x12345678;
52 a64_r = __builtin_mips_madd(a64_a, i32_b, i32_c);
54 a64_a = 0x12345678;
57 a64_r = __builtin_mips_maddu(a64_a, ui32_b, ui32_c);
59 a64_a = 0x12345678;
62 a64_r = __builtin_mips_msub(a64_a, i32_b, i32_c);
64 a64_a = 0x12345678;
67 a64_r = __builtin_mips_msubu(a64_a, ui32_b, ui32_c);
164 a64_a = 0x1234567887654321LL;
165 a64_r = __builtin_mips_shilo(a64_a, -8);
184 a64_a = 0;
187 a64_r = __builtin_mips_mulsaq_s_w_ph(a64_a, v2q15_b, v2q15_c);
189 a64_a = 0;
192 a64_r = __builtin_mips_maq_s_w_phl(a64_a, v2q15_b, v2q15_c);
194 a64_r = __builtin_mips_maq_s_w_phr(a64_a, v2q15_b, v2q15_c);
196 a64_a = 0x7FFFFFF0;
197 a64_r = __builtin_mips_maq_sa_w_phl(a64_a, v2q15_b, v2q15_c);
199 a64_r = __builtin_mips_maq_sa_w_phr(a64_a, v2q15_b, v2q15_c);
210 a64_a = 0;
213 a64_r = __builtin_mips_dpau_h_qbl(a64_a, v4i8_b, v4i8_c);
215 a64_r = __builtin_mips_dpau_h_qbr(a64_a, v4i8_b, v4i8_c);
217 a64_r = __builtin_mips_dpsu_h_qbl(a64_a, v4i8_b, v4i8_c);
219 a64_r = __builtin_mips_dpsu_h_qbr(a64_a, v4i8_b, v4i8_c);
221 a64_a = 0;
224 a64_r = __builtin_mips_dpaq_s_w_ph(a64_a, v2q15_b, v2q15_c);
226 a64_r = __builtin_mips_dpsq_s_w_ph(a64_a, v2q15_b, v2q15_c);
228 a64_a = 0;
231 a64_r = __builtin_mips_dpaq_sa_l_w(a64_a, q31_b, q31_c);
233 a64_r = __builtin_mips_dpsq_sa_l_w(a64_a, q31_b, q31_c);
259 a64_a = 0xFFFFF81230000000LL;
260 i32_r = __builtin_mips_extr_s_h(a64_a, 4);
262 a64_a = 0x8123456712345678LL;
263 i32_r = __builtin_mips_extr_w(a64_a, 31);
265 i32_r = __builtin_mips_extr_rs_w(a64_a, 31);
267 i32_r = __builtin_mips_extr_r_w(a64_a, 31);
269 a64_a = 0x1234567887654321LL;
270 i32_r = __builtin_mips_extp(a64_a, 3);
272 a64_a = 0x123456789ABCDEF0LL;
273 i32_r = __builtin_mips_extpdp(a64_a, 7);
311 a64_a = 0x1234567887654321LL;
315 a64_r = __builtin_mips_mthlip(a64_a, i32_b);
391 a64_a = 0x12345678;
394 a64_r = __builtin_mips_dpa_w_ph(a64_a, v2i16_b, v2i16_c);
396 a64_a = 0x12345678;
399 a64_r = __builtin_mips_dps_w_ph(a64_a, v2i16_b, v2i16_c);
402 a64_a = 0x70000000;
405 a64_r = __builtin_mips_dpaqx_s_w_ph(a64_a, v2q15_b, v2q15_c);
407 a64_a = 0x70000000;
410 a64_r = __builtin_mips_dpaqx_sa_w_ph(a64_a, v2q15_b, v2q15_c);
412 a64_a = 0x1111222212345678LL;
415 a64_r = __builtin_mips_dpax_w_ph(a64_a, v2i16_b, v2i16_c);
417 a64_a = 0x9999111112345678LL;
420 a64_r = __builtin_mips_dpsx_w_ph(a64_a, v2i16_b, v2i16_c);
422 a64_a = 0x70000000;
425 a64_r = __builtin_mips_dpsqx_s_w_ph(a64_a, v2q15_b, v2q15_c);
427 a64_a = 0xFFFFFFFF80000000LL;
430 a64_r = __builtin_mips_dpsqx_sa_w_ph(a64_a, v2q15_b, v2q15_c);
454 a64_a = 0x19848419;
457 a64_r = __builtin_mips_mulsa_w_ph(a64_a, v2i16_b, v2i16_c);
