Lines Matching full:live
76 "disable-sched-live-uses", cl::Hidden, cl::init(true),
77 cl::desc("Disable live use priority in sched=list-ilp"));
140 /// that are "live". These nodes must be scheduled before any other nodes that
507 /// Call ReleasePred for each predecessor, then update register live def/gen.
509 /// also defines the register. This effectively create one large live range
735 // two-address node as a live range def.
738 // Release all the implicit physical register defs that are live.
1203 /// CheckForLiveRegDef - Return true and update live register vector if the
1204 /// specified register def of the specified SUnit clobbers any "live" registers.
1212 // Check if Ref is live.
1218 // Add Reg to the set of interfering live regs.
1225 /// CheckForLiveRegDefMasked - Check for any live physregs that are clobbered
1231 // Look at all live registers. Skip Reg0 and the special CallResource.
1251 /// scheduling of the given node to satisfy live physical register dependencies.
1260 // If this node would clobber any "live" register, then it's not ready.
1262 // If SU is the currently live definition of the same register that it uses,
1302 // another call. Also, don't allow any physical registers to be live across
1375 // Update the interference with current live regs.
1383 // All candidates are delayed due to live physical reg dependencies.
1456 report_fatal_error("Can't handle live physical register dependency!");
1475 assert(CurSU && "Unable to resolve live physical register dependencies!");
1908 // their live ranges.
1912 // because it does not lengthen any live ranges.
1955 // to cover the number of registers defined (they are all live).
1990 // for uses that are not live and down for defs. Only count register classes
1992 // uses of registers that are already live.
2005 // to cover the number of registers defined (they are all live).
2049 // to cover the number of registers defined (they are all live).
2265 // Set isVRegCycle for a node with only live in opers and live out uses. Also
2273 // avoids interference between the values live in and out of the block and
2397 // long as shortening physreg live ranges is generally good, we can defer
2460 // This creates more short live intervals.
2466 // How many registers becomes live when the node is scheduled.
2598 // because it does not lengthen any live ranges.
2634 DEBUG(dbgs() << "Live uses SU(" << left->NodeNum << "): " << LLiveUses
2811 /// after N, which shortens the U->N live range, reducing
