Lines Matching full:next
16 ; CHECK-NEXT: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
19 ; CHECK-NEXT: add [[NEW:w[0-9]+]], w[[OLD]], w0
20 ; CHECK-NEXT: stlxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
21 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
36 ; CHECK-NEXT: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
39 ; CHECK-NEXT: add [[NEW:w[0-9]+]], w[[OLD]], w0
40 ; CHECK-NEXT: stxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
41 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
56 ; CHECK-NEXT: ldxr w[[OLD:[0-9]+]], [x[[ADDR]]]
59 ; CHECK-NEXT: add [[NEW:w[0-9]+]], w[[OLD]], w0
60 ; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
61 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
76 ; CHECK-NEXT: ldxr x[[OLD:[0-9]+]], [x[[ADDR]]]
79 ; CHECK-NEXT: add [[NEW:x[0-9]+]], x[[OLD]], x0
80 ; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
81 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
96 ; CHECK-NEXT: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
99 ; CHECK-NEXT: sub [[NEW:w[0-9]+]], w[[OLD]], w0
100 ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
101 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
116 ; CHECK-NEXT: ldxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
119 ; CHECK-NEXT: sub [[NEW:w[0-9]+]], w[[OLD]], w0
120 ; CHECK-NEXT: stlxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
121 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
136 ; CHECK-NEXT: ldaxr w[[OLD:[0-9]+]], [x[[ADDR]]]
139 ; CHECK-NEXT: sub [[NEW:w[0-9]+]], w[[OLD]], w0
140 ; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
141 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
156 ; CHECK-NEXT: ldaxr x[[OLD:[0-9]+]], [x[[ADDR]]]
159 ; CHECK-NEXT: sub [[NEW:x[0-9]+]], x[[OLD]], x0
160 ; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
161 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
176 ; CHECK-NEXT: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
179 ; CHECK-NEXT: and [[NEW:w[0-9]+]], w[[OLD]], w0
180 ; CHECK-NEXT: stlxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
181 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
196 ; CHECK-NEXT: ldxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
199 ; CHECK-NEXT: and [[NEW:w[0-9]+]], w[[OLD]], w0
200 ; CHECK-NEXT: stxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
201 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
216 ; CHECK-NEXT: ldaxr w[[OLD:[0-9]+]], [x[[ADDR]]]
219 ; CHECK-NEXT: and [[NEW:w[0-9]+]], w[[OLD]], w0
220 ; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
221 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
236 ; CHECK-NEXT: ldaxr x[[OLD:[0-9]+]], [x[[ADDR]]]
239 ; CHECK-NEXT: and [[NEW:x[0-9]+]], x[[OLD]], x0
240 ; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
241 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
256 ; CHECK-NEXT: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
259 ; CHECK-NEXT: orr [[NEW:w[0-9]+]], w[[OLD]], w0
260 ; CHECK-NEXT: stlxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
261 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
276 ; CHECK-NEXT: ldxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
279 ; CHECK-NEXT: orr [[NEW:w[0-9]+]], w[[OLD]], w0
280 ; CHECK-NEXT: stxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
281 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
296 ; CHECK-NEXT: ldaxr w[[OLD:[0-9]+]], [x[[ADDR]]]
299 ; CHECK-NEXT: orr [[NEW:w[0-9]+]], w[[OLD]], w0
300 ; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
301 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
316 ; CHECK-NEXT: ldxr x[[OLD:[0-9]+]], [x[[ADDR]]]
319 ; CHECK-NEXT: orr [[NEW:x[0-9]+]], x[[OLD]], x0
320 ; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
321 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
336 ; CHECK-NEXT: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
339 ; CHECK-NEXT: eor [[NEW:w[0-9]+]], w[[OLD]], w0
340 ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
341 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
356 ; CHECK-NEXT: ldxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
359 ; CHECK-NEXT: eor [[NEW:w[0-9]+]], w[[OLD]], w0
360 ; CHECK-NEXT: stlxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
361 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
376 ; CHECK-NEXT: ldaxr w[[OLD:[0-9]+]], [x[[ADDR]]]
379 ; CHECK-NEXT: eor [[NEW:w[0-9]+]], w[[OLD]], w0
380 ; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
381 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
396 ; CHECK-NEXT: ldxr x[[OLD:[0-9]+]], [x[[ADDR]]]
399 ; CHECK-NEXT: eor [[NEW:x[0-9]+]], x[[OLD]], x0
400 ; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
401 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
416 ; CHECK-NEXT: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
419 ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], w0, [x[[ADDR]]]
420 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
435 ; CHECK-NEXT: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
438 ; CHECK-NEXT: stlxrh [[STATUS:w[0-9]+]], w0, [x[[ADDR]]]
439 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
454 ; CHECK-NEXT: ldxr w[[OLD:[0-9]+]], [x[[ADDR]]]
457 ; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], w0, [x[[ADDR]]]
458 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
473 ; CHECK-NEXT: ldaxr x[[OLD:[0-9]+]], [x[[ADDR]]]
476 ; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], x0, [x[[ADDR]]]
477 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
493 ; CHECK-NEXT
496 ; CHECK-NEXT: cmp w0, w[[OLD]], sxtb
497 ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, gt
498 ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
499 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
514 ; CHECK-NEXT: ldxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
517 ; CHECK-NEXT: cmp w0, w[[OLD]], sxth
518 ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, gt
519 ; CHECK-NEXT: stlxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
520 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
535 ; CHECK-NEXT: ldxr w[[OLD:[0-9]+]], [x[[ADDR]]]
538 ; CHECK-NEXT: cmp w0, w[[OLD]]
539 ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, gt
540 ; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
541 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
556 ; CHECK-NEXT: ldaxr x[[OLD:[0-9]+]], [x[[ADDR]]]
559 ; CHECK-NEXT: cmp x0, x[[OLD]]
560 ; CHECK-NEXT: csel [[NEW:x[0-9]+]], x[[OLD]], x0, gt
561 ; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
562 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
577 ; CHECK-NEXT: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
580 ; CHECK-NEXT: cmp w0, w[[OLD]], sxtb
581 ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, lt
582 ; CHECK-NEXT: stlxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
583 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
598 ; CHECK-NEXT: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
601 ; CHECK-NEXT: cmp w0, w[[OLD]], sxth
602 ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, lt
603 ; CHECK-NEXT: stxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
604 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
619 ; CHECK-NEXT: ldxr w[[OLD:[0-9]+]], [x[[ADDR]]]
622 ; CHECK-NEXT: cmp w0, w[[OLD]]
623 ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, lt
624 ; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
625 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
640 ; CHECK-NEXT: ldxr x[[OLD:[0-9]+]], [x[[ADDR]]]
643 ; CHECK-NEXT: cmp x0, x[[OLD]]
644 ; CHECK-NEXT: csel [[NEW:x[0-9]+]], x[[OLD]], x0, lt
645 ; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
646 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
661 ; CHECK-NEXT: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
664 ; CHECK-NEXT: cmp w0, w[[OLD]], uxtb
665 ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, hi
666 ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
667 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
682 ; CHECK-NEXT: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
685 ; CHECK-NEXT: cmp w0, w[[OLD]], uxth
686 ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, hi
687 ; CHECK-NEXT: stxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
688 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
703 ; CHECK-NEXT: ldaxr w[[OLD:[0-9]+]], [x[[ADDR]]]
706 ; CHECK-NEXT: cmp w0, w[[OLD]]
707 ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, hi
708 ; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
709 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
724 ; CHECK-NEXT: ldaxr x[[OLD:[0-9]+]], [x[[ADDR]]]
727 ; CHECK-NEXT: cmp x0, x[[OLD]]
728 ; CHECK-NEXT: csel [[NEW:x[0-9]+]], x[[OLD]], x0, hi
729 ; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
730 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
745 ; CHECK-NEXT: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
748 ; CHECK-NEXT: cmp w0, w[[OLD]], uxtb
749 ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, lo
750 ; CHECK-NEXT: stlxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
751 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
766 ; CHECK-NEXT: ldxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
769 ; CHECK-NEXT: cmp w0, w[[OLD]], uxth
770 ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, lo
771 ; CHECK-NEXT: stxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
772 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
787 ; CHECK-NEXT: ldaxr w[[OLD:[0-9]+]], [x[[ADDR]]]
790 ; CHECK-NEXT: cmp w0, w[[OLD]]
791 ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, lo
792 ; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
793 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
808 ; CHECK-NEXT: ldxr x[[OLD:[0-9]+]], [x[[ADDR]]]
811 ; CHECK-NEXT: cmp x0, x[[OLD]]
812 ; CHECK-NEXT: csel [[NEW:x[0-9]+]], x[[OLD]], x0, lo
813 ; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
814 ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1
829 ; CHECK-NEXT: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
832 ; CHECK-NEXT: cmp w[[OLD]], w0
833 ; CHECK-NEXT: b.ne [[GET_OUT:.LBB[0-9]+_[0-9]+]]
836 ; CHECK-NEXT: cbnz [[STATUS]], [[STARTAGAIN]]
851 ; CHECK-NEXT: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
854 ; CHECK-NEXT: cmp w[[OLD]], w0
855 ; CHECK-NEXT: b.ne [[GET_OUT:.LBB[0-9]+_[0-9]+]]
858 ; CHECK-NEXT: cbnz [[STATUS]], [[STARTAGAIN]]
873 ; CHECK-NEXT: ldxr w[[OLD:[0-9]+]], [x[[ADDR]]]
876 ; CHECK-NEXT: cmp w[[OLD]], w0
877 ; CHECK-NEXT: b.ne [[GET_OUT:.LBB[0-9]+_[0-9]+]]
880 ; CHECK-NEXT: cbnz [[STATUS]], [[STARTAGAIN]]
895 ; CHECK-NEXT: ldxr x[[OLD:[0-9]+]], [x[[ADDR]]]
898 ; CHECK-NEXT: cmp x[[OLD]], x0
899 ; CHECK-NEXT: b.ne [[GET_OUT:.LBB[0-9]+_[0-9]+]]
902 ; CHECK-NEXT: cbnz [[STATUS]], [[STARTAGAIN]]
