Lines Matching full:arm
1 ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM
2 ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM
4 ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -arm-long-calls | FileCheck %s --check-prefix=ARM-LONG
5 ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -arm-long-calls | FileCheck %s --check-prefix=ARM-LONG
6 ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -arm-long-calls | FileCheck %s --check-prefix=THUMB-LONG
16 ; ARM: t1
17 ; ARM: {{(movw r0, :lower16:_?message1)|(ldr r0, .LCPI)}}
18 ; ARM: {{(movt r0, :upper16:_?message1)|(ldr r0, \[r0\])}}
19 ; ARM: add r0, r0, #5
20 ; ARM: movw r1, #64
21 ; ARM: movw r2, #10
22 ; ARM: and r1, r1, #255
23 ; ARM: bl {{_?}}memset
24 ; ARM-LONG: t1
25 ; ARM-LONG: {{(movw r3, :lower16:L_memset\$non_lazy_ptr)|(ldr r3, .LCPI)}}
26 ; ARM-LONG: {{(movt r3, :upper16:L_memset\$non_lazy_ptr)?}}
27 ; ARM-LONG: ldr r3, [r3]
28 ; ARM-LONG: blx r3
51 ; ARM: t2
52 ; ARM: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
53 ; ARM: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
54 ; ARM: ldr r0, [r0]
55 ; ARM: add r1, r0, #4
56 ; ARM: add r0, r0, #16
57 ; ARM: movw r2, #17
58 ; ARM: str r0, [sp[[SLOT:[, #0-9]*]]] @ 4-byte Spill
59 ; ARM: mov r0, r1
60 ; ARM: ldr r1, [sp[[SLOT]]] @ 4-byte Reload
61 ; ARM: bl {{_?}}memcpy
62 ; ARM-LONG: t2
63 ; ARM-LONG: {{(movw r3, :lower16:L_memcpy\$non_lazy_ptr)|(ldr r3, .LCPI)}}
64 ; ARM-LONG: {{(movt r3, :upper16:L_memcpy\$non_lazy_ptr)?}}
65 ; ARM-LONG: ldr r3, [r3]
66 ; ARM-LONG: blx r3
91 ; ARM: t3
92 ; ARM: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
93 ; ARM: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
94 ; ARM: ldr r0, [r0]
95 ; ARM: add r1, r0, #4
96 ; ARM: add r0, r0, #16
97 ; ARM: movw r2, #10
98 ; ARM: mov r0, r1
99 ; ARM: bl {{_?}}memmove
100 ; ARM-LONG: t3
101 ; ARM-LONG: {{(movw r3, :lower16:L_memmove\$non_lazy_ptr)|(ldr r3, .LCPI)}}
102 ; ARM-LONG: {{(movt r3, :upper16:L_memmove\$non_lazy_ptr)?}}
103 ; ARM-LONG: ldr r3, [r3]
104 ; ARM-LONG: blx r3
127 ; ARM: t4
128 ; ARM: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
129 ; ARM: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
130 ; ARM: ldr r0, [r0]
131 ; ARM: ldr r1, [r0, #16]
132 ; ARM: str r1, [r0, #4]
133 ; ARM: ldr r1, [r0, #20]
134 ; ARM: str r1, [r0, #8]
135 ; ARM: ldrh r1, [r0, #24]
136 ; ARM: strh r1, [r0, #12]
137 ; ARM: bx lr
156 ; ARM: t5
157 ; ARM: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
158 ; ARM: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
159 ; ARM: ldr r0, [r0]
160 ; ARM: ldrh r1, [r0, #16]
161 ; ARM: strh r1, [r0, #4]
162 ; ARM: ldrh r1, [r0, #18]
163 ; ARM: strh r1, [r0, #6]
164 ; ARM: ldrh r1, [r0, #20]
165 ; ARM: strh r1, [r0, #8]
166 ; ARM: ldrh r1, [r0, #22]
167 ; ARM: strh r1, [r0, #10]
168 ; ARM: ldrh r1, [r0, #24]
169 ; ARM: strh r1, [r0, #12]
170 ; ARM: bx lr
191 ; ARM: t6
192 ; ARM: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
193 ; ARM: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
194 ; ARM: ldr r0, [r0]
195 ; ARM: ldrb r1, [r0, #16]
196 ; ARM: strb r1, [r0, #4]
197 ; ARM: ldrb r1, [r0, #17]
198 ; ARM: strb r1, [r0, #5]
199 ; ARM: ldrb r1, [r0, #18]
200 ; ARM: strb r1, [r0, #6]
201 ; ARM: ldrb r1, [r0, #19]
202 ; ARM: strb r1, [r0, #7]
203 ; ARM: ldrb r1, [r0, #20]
204 ; ARM: strb r1, [r0, #8]
205 ; ARM: ldrb r1, [r0, #21]
206 ; ARM: strb r1, [r0, #9]
207 ; ARM: ldrb r1, [r0, #22]
208 ; ARM: strb r1, [r0, #10]
209 ; ARM: ldrb r1, [r0, #23]
210 ; ARM: strb r1, [r0, #11]
211 ; ARM: ldrb r1, [r0, #24]
212 ; ARM: strb r1, [r0, #12]
213 ; ARM: ldrb r1, [r0, #25]
214 ; ARM: strb r1, [r0, #13]
215 ; ARM: bx lr
254 ; ARM: t8
255 ; ARM-NOT: FastISel missed call: %expval = call i32 @llvm.expect.i32(i32 %x, i32 1)
