Lines Matching full:vld1
7 ;CHECK: vld1.8 {d16}, [r0:64]
8 %tmp1 = call <8 x i8> @llvm.arm.neon.vld1.v8i8(i8* %A, i32 16)
14 ;CHECK: vld1.16
16 %tmp1 = call <4 x i16> @llvm.arm.neon.vld1.v4i16(i8* %tmp0, i32 1)
23 ;CHECK: vld1.16 {d16}, [{{r[0-9]+}}]!
26 %tmp1 = call <4 x i16> @llvm.arm.neon.vld1.v4i16(i8* %tmp0, i32 1)
34 ;CHECK: vld1.32
36 %tmp1 = call <2 x i32> @llvm.arm.neon.vld1.v2i32(i8* %tmp0, i32 1)
43 ;CHECK: vld1.32 {d16}, [{{r[0-9]+}}], {{r[0-9]+}}
46 %tmp1 = call <2 x i32> @llvm.arm.neon.vld1.v2i32(i8* %tmp0, i32 1)
54 ;CHECK: vld1.32
56 %tmp1 = call <2 x float> @llvm.arm.neon.vld1.v2f32(i8* %tmp0, i32 1)
62 ;CHECK: vld1.64
64 %tmp1 = call <1 x i64> @llvm.arm.neon.vld1.v1i64(i8* %tmp0, i32 1)
71 ;CHECK: vld1.8 {d16, d17}, [r0:64]
72 %tmp1 = call <16 x i8> @llvm.arm.neon.vld1.v16i8(i8* %A, i32 8)
79 ;CHECK: vld1.8 {d16, d17}, [{{r[0-9]+}}:64]!
81 %tmp1 = call <16 x i8> @llvm.arm.neon.vld1.v16i8(i8* %A, i32 8)
90 ;CHECK: vld1.16 {d16, d17}, [r0:128]
92 %tmp1 = call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %tmp0, i32 32)
98 ;CHECK: vld1.32
100 %tmp1 = call <4 x i32> @llvm.arm.neon.vld1.v4i32(i8* %tmp0, i32 1)
106 ;CHECK: vld1.32
108 %tmp1 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %tmp0, i32 1)
114 ;CHECK: vld1.64
116 %tmp1 = call <2 x i64> @llvm.arm.neon.vld1.v2i64(i8* %tmp0, i32 1)
120 declare <8 x i8> @llvm.arm.neon.vld1.v8i8(i8*, i32) nounwind readonly
121 declare <4 x i16> @llvm.arm.neon.vld1.v4i16(i8*, i32) nounwind readonly
122 declare <2 x i32> @llvm.arm.neon.vld1.v2i32(i8*, i32) nounwind readonly
123 declare <2 x float> @llvm.arm.neon.vld1.v2f32(i8*, i32) nounwind readonly
124 declare <1 x i64> @llvm.arm.neon.vld1.v1i64(i8*, i32) nounwind readonly
126 declare <16 x i8> @llvm.arm.neon.vld1.v16i8(i8*, i32) nounwind readonly
127 declare <8 x i16> @llvm.arm.neon.vld1.v8i16(i8*, i32) nounwind readonly
128 declare <4 x i32> @llvm.arm.neon.vld1.v4i32(i8*, i32) nounwind readonly
129 declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*, i32) nounwind readonly
130 declare <2 x i64> @llvm.arm.neon.vld1.v2i64(i8*, i32) nounwind readonly
133 ; Do not crash if the vld1 result is not used.
136 %0 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1)