Lines Matching full:next
258 ; CHECK-NEXT: %1 = or i32 %X, -9
259 ; CHECK-NEXT: ret i32 %1
269 ; CHECK-NEXT: %1 = or i32 %X, -9
270 ; CHECK-NEXT: %2 = xor i32 %1, 8
271 ; CHECK-NEXT: ret i32 %2
281 ; CHECK-NEXT: %t1 = shl i32 %X, 8
282 ; CHECK-NEXT: %1 = and i32 %t1, 512
283 ; CHECK-NEXT: %2 = xor i32 %1, 512
284 ; CHECK-NEXT: %3 = add i32 %2, 577
285 ; CHECK-NEXT: ret i32 %3
295 ; CHECK-NEXT: %t1 = shl i32 %X, 8
296 ; CHECK-NEXT: %1 = and i32 %t1, 512
297 ; CHECK-NEXT: %2 = add i32 %1, 577
298 ; CHECK-NEXT: ret i32 %2
306 ; CHECK-NEXT: %V = load i32* %P
335 ; CHECK-NEXT: ashr i32 %x, 31
336 ; CHECK-NEXT: ret i32
344 ; CHECK-NEXT: ashr i32 %x, 31
345 ; CHECK-NEXT: ret i32
353 ; CHECK-NEXT: ashr i32 %x, 31
354 ; CHECK-NEXT: sext i32
355 ; CHECK-NEXT: ret i64
363 ; CHECK-NEXT: ashr i32 %x, 31
364 ; CHECK-NEXT: trunc i32
365 ; CHECK-NEXT: ret i16
372 ; CHECK-NEXT: %c = and i1 %a, %b
373 ; CHECK-NEXT: ret i1 %c
380 ; CHECK-NEXT: %c = or i1 %a, %b
381 ; CHECK-NEXT: ret i1 %c
395 ; CHECK-NEXT: ret i32 %a
410 ; CHECK-NEXT: ret i32 %a
424 ; CHECK-NEXT: ret i32 %a
439 ; CHECK-NEXT: ret i32 %a
450 br label %next
452 next:
584 ; CHECK-NEXT: and i32 %x, %y
585 ; CHECK-NEXT: ret i32
594 ; CHECK-NEXT: %cond = icmp eq i32 %x, 0
595 ; CHECK-NEXT: %b = sext i1 %cond to i32
596 ; CHECK-NEXT: %c = add i32 %b, %y
597 ; CHECK-NEXT: ret i32 %c
606 ; CHECK-NEXT: %a_ext = sext i32 %a to i64
607 ; CHECK-NEXT: %is_a_nonnegative = icmp slt i64 %a_ext, 0
608 ; CHECK-NEXT: %max = select i1 %is_a_nonnegative, i64 0, i64 %a_ext
609 ; CHECK-NEXT: ret i64 %max
618 ; CHECK-NEXT: %a_ext = sext i32 %a to i64
619 ; CHECK-NEXT: %is_a_nonpositive = icmp sgt i64 %a_ext, 0
620 ; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 0, i64 %a_ext
621 ; CHECK-NEXT: ret i64 %min
629 ; CHECK-NEXT: %a_ext = zext i32 %a to i64
630 ; CHECK-NEXT: %is_a_nonnegative = icmp ult i64 %a_ext, 3
631 ; CHECK-NEXT: %max = select i1 %is_a_nonnegative, i64 3, i64 %a_ext
632 ; CHECK-NEXT: ret i64 %max
641 ; CHECK-NEXT: %a_ext = zext i32 %a to i64
642 ; CHECK-NEXT: %is_a_nonpositive = icmp ugt i64 %a_ext, 2
643 ; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 2, i64 %a_ext
644 ; CHECK-NEXT: ret i64 %min
652 ; CHECK-NEXT: %a_ext = sext i32 %a to i64
653 ; CHECK-NEXT
654 ; CHECK-NEXT: %max = select i1 %is_a_nonnegative, i64 3, i64 %a_ext
655 ; CHECK-NEXT: ret i64 %max
664 ; CHECK-NEXT: %a_ext = sext i32 %a to i64
665 ; CHECK-NEXT: %is_a_nonpositive = icmp ugt i64 %a_ext, 2
666 ; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 2, i64 %a_ext
667 ; CHECK-NEXT: ret i64 %min
676 ; CHECK-NEXT: %a_ext = sext i32 %a to i64
677 ; CHECK-NEXT: %is_a_nonpositive = icmp ugt i64 %a_ext, 2
678 ; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 2
679 ; CHECK-NEXT: ret i64 %min
687 ; CHECK-NEXT: %a_ext = sext i32 %a to i64
688 ; CHECK-NEXT: %is_a_nonpositive = icmp ugt i64 %a_ext, 2
689 ; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 2
690 ; CHECK-NEXT: ret i64 %min
759 ; CHECK-NEXT: zext
760 ; CHECK-NEXT: ret
769 ; CHECK-NEXT: and i32 %x, %y
770 ; CHECK-NEXT: ret
779 ; CHECK-NEXT: zext
780 ; CHECK-NEXT: ret
789 ; CHECK-NEXT: and i32 %x, %y
790 ; CHECK-NEXT: ret
868 ; CHECK-NEXT: [[SHL:%[a-z0-9]+]] = shl i32 %x, 1
869 ; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[SHL]], 2
870 ; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[AND]], %y
871 ; CHECK-NEXT: ret i32 [[OR]]
881 ; CHECK-NEXT: [[LSHR:%[a-z0-9]+]] = lshr i32 %x, 2
882 ; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[LSHR]], 8
883 ; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[AND]], %y
884 ; CHECK-NEXT: ret i32 [[OR]]
894 ; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, 4096
895 ; CHECK-NEXT: [[XOR:%[a-z0-9]+]] = xor i32 [[AND]], 4096
896 ; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[XOR]], %y
897 ; CHECK-NEXT: ret i32 [[OR]]
907 ; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, 4096
908 ; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[AND]], %y
909 ; CHECK-NEXT: ret i32 [[OR]]
919 ; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i64 %x, 1
920 ; CHECK-NEXT: [[ZEXT:%[a-z0-9]+]] = trunc i64 [[AND]] to i32
921 ; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[XOR]], %y
922 ; CHECK-NEXT: ret i32 [[OR]]
932 ; CHECK-NEXT: [[LSHR:%[a-z0-9]+]] = lshr i32 %x, 7
933 ; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[LSHR]], 32
934 ; CHECK-NEXT: [[XOR:%[a-z0-9]+]] = xor i32 [[AND]], 32
935 ; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[XOR]], %y
936 ; CHECK-NEXT: ret i32 [[OR]]
946 ; CHECK-NEXT: [[SHL:%[a-z0-9]+]] = shl i32 %x, 7
947 ; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[SHL]], 4096
948 ; CHECK-NEXT: [[XOR:%[a-z0-9]+]] = xor i32 [[AND]], 4096
949 ; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[XOR]], %y
950 ; CHECK-NEXT: ret i32 [[OR]]
960 ; CHECK-NEXT: [[LSHR:%[a-z0-9]+]] = lshr i32 %x, 27
961 ; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[LSHR]], 8
962 ; CHECK-NEXT: [[TRUNC:%[a-z0-9]+]] = trunc i32 [[AND]] to i8
963 ; CHECK-NEXT: [[XOR:%[a-z0-9]+]] = xor i8 [[TRUNC]], 8
964 ; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i8 [[XOR]], %y
965 ; CHECK-NEXT: ret i8 [[OR]]
975 ; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i8 %x, 8
976 ; CHECK-NEXT: [[ZEXT:%[a-z0-9]+]] = zext i8 [[AND]] to i32
977 ; CHECK-NEXT: [[SHL:%[a-z0-9]+]] = shl nuw nsw i32 [[ZEXT]], 27
978 ; CHECK-NEXT: [[XOR:%[a-z0-9]+]] = xor i32 [[SHL]], 1073741824
979 ; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[XOR]], %y
980 ; CHECK-NEXT: ret i32 [[OR]]
