Lines Matching full:full
19 "9-0 Replays within the IFU due to full Instruction Buffer"},
25 "13-0 DR stage stall cycles due to DDQ0 (ALU out-of-order dispatch queue) full"},
27 "14-0 DR stage stall cycles due to ALCB (ALU completion buffers) full"},
29 "15-0 DR stage stall cycles due to CLDQ (data comming back from FPU) full"},
53 "27-0 Load/store graduation blocked cycles due to CP1/2 store data not ready, SYNC/SYNCI/SC/CACHEOP at the head, or FSB/LDQ/WBB/ITU FIFO full"},
59 "30-0 Pipe stall cycles due to FSB full"},
61 "31-0 Pipe stall cycles due to LDQ full"},
63 "32-0 Pipe stall cycles due to WBB full"},
129 "74-0 FSB < 25% full"},
131 "75-0 LDQ < 25% full"},
133 "76-0 WBB < 25% full"},
151 "13-1 DR stage stall cycles due to DDQ1 (AGEN out-of-order dispatch queue) full"},
153 "14-1 DR stage stall cycles due to AGCB (AGEN completion buffers) full"},
155 "15-1 DR stage stall cycles due to IODQ (data comming back from IO) full"},
185 "30-1 FSB > 50% full"},
187 "31-1 LDQ > 50% full"},
189 "32-1 WBB > 50% full"},
243 "74-1 FSB 25-50% full"},
245 "75-1 LDQ 25-50% full"},
247 "76-1 WBB 25-50% full"},
