Lines Matching full:x02
20 0x02 (S)hared cache state
27 0x02 (S)hared cache state from L2
34 0x02 Multiply pipe
41 0x02 CS register
49 0x02 Piggyback scrubber errors
52 0x02 Store
56 0x02 Combined MMX & 3DNow instructions
61 0x02 With low op in position 1
65 0x02 SSE retype microfaults
70 0x02 Page miss
74 0x02 Read to write turnaround
78 0x02 Memory controller low priority bypass
83 0x02 Non-posted write dword
91 0x02 Probe hit clean
99 0x02 Data sent
104 0x02 DC fill
110 0x02 DC fill
114 0x02 L2 writebacks to system
117 0x02 GART aperture hit on access from I/O
163 0x02 Prefetch attempts
166 0x02 Requests to write-combining (WC) memory or WC buffer flushes to WB memory
170 0x02 Modified
175 name:dcachemisslocked type:bitmask default:0x02
176 0x02 Data cache misses by locked instructions
179 0x02 The number of cycles spent in speculative phase
183 0x02 Number of clocks CPU clock is inactive when HTC is active (RevF)
