Lines Matching full:cpu_tmp0
70 static TCGv cpu_tmp0, cpu_tmp4;
291 tcg_gen_movi_tl(cpu_tmp0, 0);
292 tcg_gen_st32_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]) + REG_LH_OFFSET);
327 tcg_gen_movi_tl(cpu_tmp0, 0);
328 tcg_gen_st32_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]) + REG_LH_OFFSET);
409 tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]));
410 tcg_gen_addi_tl(cpu_tmp0, cpu_tmp0, val);
411 tcg_gen_st16_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]) + REG_W_OFFSET);
414 tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]));
415 tcg_gen_addi_tl(cpu_tmp0, cpu_tmp0, val);
417 tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, 0xffffffff);
419 tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]));
423 tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]));
424 tcg_gen_addi_tl(cpu_tmp0, cpu_tmp0, val);
425 tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]));
435 tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]));
436 tcg_gen_add_tl(cpu_tmp0, cpu_tmp0, cpu_T[0]);
437 tcg_gen_st16_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]) + REG_W_OFFSET);
440 tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]));
441 tcg_gen_add_tl(cpu_tmp0, cpu_tmp0, cpu_T[0]);
443 tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, 0xffffffff);
445 tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]));
449 tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]));
450 tcg_gen_add_tl(cpu_tmp0, cpu_tmp0, cpu_T[0]);
451 tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]));
464 tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]));
466 tcg_gen_shli_tl(cpu_tmp0, cpu_tmp0, shift);
467 tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_tmp0);
480 tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, segs[reg].base));
481 tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_tmp0);
495 tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, segs[reg].base));
496 tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_tmp0);
506 tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]));
508 tcg_gen_shli_tl(cpu_tmp0, cpu_tmp0, shift);
509 tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_tmp0);
604 tcg_gen_movi_tl(cpu_tmp0, pc);
605 tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUState, eip));
706 tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[R_ECX]));
707 gen_extu(size + 1, cpu_tmp0);
708 tcg_gen_brcondi_tl(TCG_COND_NE, cpu_tmp0, 0, label1);
713 tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[R_ECX]));
714 gen_extu(size + 1, cpu_tmp0);
715 tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_tmp0, 0, label1);
854 gen_compute_eflags(cpu_tmp0);
855 tcg_gen_shri_tl(cpu_T[0], cpu_tmp0, 6);
856 tcg_gen_or_tl(cpu_T[0], cpu_T[0], cpu_tmp0);
870 gen_compute_eflags(cpu_tmp0);
871 tcg_gen_shri_tl(cpu_T[0], cpu_tmp0, 11); /* CC_O */
872 tcg_gen_shri_tl(cpu_tmp0, cpu_tmp0, 7); /* CC_S */
873 tcg_gen_xor_tl(cpu_T[0], cpu_T[0], cpu_tmp0);
878 gen_compute_eflags(cpu_tmp0);
879 tcg_gen_shri_tl(cpu_T[0], cpu_tmp0, 11); /* CC_O */
880 tcg_gen_shri_tl(cpu_tmp4, cpu_tmp0, 7); /* CC_S */
881 tcg_gen_shri_tl(cpu_tmp0, cpu_tmp0, 6); /* CC_Z */
883 tcg_gen_or_tl(cpu_T[0], cpu_T[0], cpu_tmp0);
963 tcg_gen_andi_tl(cpu_tmp0, cpu_cc_dst, 0xff);
964 t0 = cpu_tmp0;
967 tcg_gen_andi_tl(cpu_tmp0, cpu_cc_dst, 0xffff);
968 t0 = cpu_tmp0;
972 tcg_gen_andi_tl(cpu_tmp0, cpu_cc_dst, 0xffffffff);
973 t0 = cpu_tmp0;
986 tcg_gen_andi_tl(cpu_tmp0, cpu_cc_dst, 0x80);
987 tcg_gen_brcondi_tl(inv ? TCG_COND_EQ : TCG_COND_NE, cpu_tmp0,
991 tcg_gen_andi_tl(cpu_tmp0, cpu_cc_dst, 0x8000);
992 tcg_gen_brcondi_tl(inv ? TCG_COND_EQ : TCG_COND_NE, cpu_tmp0,
997 tcg_gen_andi_tl(cpu_tmp0, cpu_cc_dst, 0x80000000);
998 tcg_gen_brcondi_tl(inv ? TCG_COND_EQ : TCG_COND_NE, cpu_tmp0,
1018 t0 = cpu_tmp0;
1023 t0 = cpu_tmp0;
1029 t0 = cpu_tmp0;
1050 t0 = cpu_tmp0;
1055 t0 = cpu_tmp0;
1061 t0 = cpu_tmp0;
1590 tcg_gen_andi_tl(cpu_tmp0, t1, (1 << (3 + ot)) - 1);
1592 tcg_gen_mov_tl(cpu_tmp0, t1);
1601 tcg_gen_shr_tl(cpu_tmp4, t0, cpu_tmp0);
1602 tcg_gen_sub_tl(cpu_tmp0, tcg_const_tl(data_bits), cpu_tmp0);
1603 tcg_gen_shl_tl(t0, t0, cpu_tmp0);
1605 tcg_gen_shl_tl(cpu_tmp4, t0, cpu_tmp0);
1606 tcg_gen_sub_tl(cpu_tmp0, tcg_const_tl(data_bits), cpu_tmp0);
1607 tcg_gen_shr_tl(t0, t0, cpu_tmp0);
1628 tcg_gen_xor_tl(cpu_tmp0, t2, t0);
1629 tcg_gen_lshift(cpu_tmp0, cpu_tmp0, 11 - (data_bits - 1));
1630 tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, CC_O);
1631 tcg_gen_or_tl(cpu_cc_src, cpu_cc_src, cpu_tmp0);
1707 tcg_gen_xor_tl(cpu_tmp0, t1, t0);
1708 tcg_gen_lshift(cpu_tmp0, cpu_tmp0, 11 - (data_bits - 1));
1709 tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, CC_O);
1710 tcg_gen_or_tl(cpu_cc_src, cpu_cc_src, cpu_tmp0);
1820 tcg_gen_shli_tl(cpu_tmp0, t1, 16);
1821 tcg_gen_or_tl(t0, t0, cpu_tmp0);
1828 tcg_gen_shl_tl(cpu_tmp0, t0, cpu_tmp5);
1832 tcg_gen_or_tl(t0, t0, cpu_tmp0);
1841 tcg_gen_sub_tl(cpu_tmp0, tcg_const_tl(32), cpu_tmp5);
1842 tcg_gen_shr_tl(cpu_tmp6, t1, cpu_tmp0);
2762 tcg_gen_addi_tl(cpu_tmp0, cpu_A0, 8);
2763 tcg_gen_qemu_ld64(cpu_tmp1_i64, cpu_tmp0, mem_index);
2772 tcg_gen_addi_tl(cpu_tmp0, cpu_A0, 8);
2774 tcg_gen_qemu_st64(cpu_tmp1_i64, cpu_tmp0, mem_index);
3684 tcg_gen_qemu_ld32u(cpu_tmp0, cpu_A0,
3686 tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_tmp0);
3691 tcg_gen_qemu_ld16u(cpu_tmp0, cpu_A0,
3693 tcg_gen_st16_tl(cpu_tmp0, cpu_env, op2_offset +
3832 tcg_gen_qemu_ld8u(cpu_tmp0, cpu_A0,
3834 tcg_gen_st8_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State,
3843 tcg_gen_qemu_ld32u(cpu_tmp0, cpu_A0,
3845 tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_tmp0);
3870 gen_op_mov_v_reg(ot, cpu_tmp0, rm);
3872 tcg_gen_qemu_ld32u(cpu_tmp0, cpu_A0,
3874 tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_tmp0);
4427 tcg_gen_ext8s_tl(cpu_tmp0, cpu_T[0]);
4428 tcg_gen_sub_tl(cpu_cc_src, cpu_T[0], cpu_tmp0);
4439 tcg_gen_ext16s_tl(cpu_tmp0, cpu_T[0]);
4440 tcg_gen_sub_tl(cpu_cc_src, cpu_T[0], cpu_tmp0);
4454 tcg_gen_ext32s_tl(cpu_tmp0, cpu_T[0]);
4455 tcg_gen_sub_tl(cpu_cc_src, cpu_T[0], cpu_tmp0);
4470 tcg_gen_sari_tl(cpu_tmp0, cpu_T[0], 31);
4474 tcg_gen_sub_tl(cpu_cc_src, cpu_T[0], cpu_tmp0);
4754 tcg_gen_ext32s_tl(cpu_tmp0, cpu_T[0]);
4755 tcg_gen_sub_tl(cpu_cc_src, cpu_T[0], cpu_tmp0);
4766 tcg_gen_sari_tl(cpu_tmp0, cpu_T[0], 31);
4769 tcg_gen_sub_tl(cpu_cc_src, cpu_T[1], cpu_tmp0);
4778 tcg_gen_ext16s_tl(cpu_tmp0, cpu_T[0]);
4779 tcg_gen_sub_tl(cpu_cc_src, cpu_T[0], cpu_tmp0);
6324 tcg_gen_movi_tl(cpu_tmp0, 0);
6325 tcg_gen_st32_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]) + REG_LH_OFFSET);
6487 tcg_gen_sari_tl(cpu_tmp0, cpu_T[1], 3 + ot);
6488 tcg_gen_shli_tl(cpu_tmp0, cpu_tmp0, ot);
6489 tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_tmp0);
6503 tcg_gen_movi_tl(cpu_tmp0, 1);
6504 tcg_gen_shl_tl(cpu_tmp0, cpu_tmp0, cpu_T[1]);
6505 tcg_gen_or_tl(cpu_T[0], cpu_T[0], cpu_tmp0);
6509 tcg_gen_movi_tl(cpu_tmp0, 1);
6510 tcg_gen_shl_tl(cpu_tmp0, cpu_tmp0, cpu_T[1]);
6511 tcg_gen_not_tl(cpu_tmp0, cpu_tmp0);
6512 tcg_gen_and_tl(cpu_T[0], cpu_T[0], cpu_tmp0);
6517 tcg_gen_movi_tl(cpu_tmp0, 1);
6518 tcg_gen_shl_tl(cpu_tmp0, cpu_tmp0, cpu_T[1]);
6519 tcg_gen_xor_tl(cpu_T[0], cpu_T[0], cpu_tmp0);
6772 gen_compute_eflags(cpu_tmp0);
6773 tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, CC_Z);
6775 tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_tmp0, 0, l1);
6777 tcg_gen_brcondi_tl(TCG_COND_NE, cpu_tmp0, 0, l1);
7265 tcg_gen_andi_tl(cpu_tmp0, t0, 3);
7269 tcg_gen_brcond_tl(TCG_COND_GE, cpu_tmp0, t1, label1);
7308 tcg_gen_andi_tl(cpu_tmp0, cpu_cc_src, CC_Z);
7310 tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_tmp0, 0, label1);
7670 cpu_tmp0 = tcg_temp_new();
