Lines Matching refs:instructions
56 // can be defined to enable ARMv7 and VFPv3 instructions when building the
142 void RelocInfo::PatchCode(byte* instructions, int instruction_count) {
143 // Patch the code at the current address with the supplied instructions.
145 Instr* instr = reinterpret_cast<Instr*>(instructions);
156 // Additional guard instructions can be added if required.
236 // Specific instructions, constants, and masks.
275 // A mask for the Rd register for push, pop, ldr, str instructions.
662 // Keep track of the last bound label so we don't eliminate any instructions
808 // instructions).
813 // instructions - either mov or ldr. The mov might actually be two
814 // instructions mov or movw followed by movt so including the actual
815 // instruction two or three instructions will be generated.
1025 // Branch instructions.
1072 // Data-processing instructions.
1159 // Don't allow nop instructions in the form mov rn, rn to be generated using
1161 // or MarkCode(int/NopMarkerTypes) pseudo instructions.
1189 // Multiply instructions.
1258 // Miscellaneous arithmetic instructions.
1267 // Saturating instructions.
1291 // Bitfield manipulation instructions.
1367 // Status register access instructions.
1399 // Load/Store instructions.
1464 // Load/Store multiple instructions.
1494 // Exception-generating instructions and debugging support.
1540 // Coprocessor instructions.
2393 // Pseudo instructions.
2555 void Assembler::BlockConstPoolFor(int instructions) {
2556 int pc_limit = pc_offset() + instructions * kInstrSize;
