Lines Matching refs:src1
1127 void MacroAssembler::SmiOrIfSmis(Register dst, Register src1, Register src2,
1130 if (dst.is(src1) || dst.is(src2)) {
1131 ASSERT(!src1.is(kScratchRegister));
1133 movq(kScratchRegister, src1);
1138 movq(dst, src1);
1304 void MacroAssembler::JumpIfNotBothSmi(Register src1,
1308 Condition both_smi = CheckBothSmi(src1, src2);
1313 void MacroAssembler::JumpUnlessBothNonNegativeSmi(Register src1,
1317 Condition both_smi = CheckBothNonNegativeSmi(src1, src2);
1516 Register src1,
1522 if (dst.is(src1)) {
1523 movq(kScratchRegister, src1);
1528 movq(dst, src1);
1536 Register src1,
1541 if (dst.is(src1)) {
1542 movq(kScratchRegister, src1);
1548 movq(dst, src1);
1556 Register src1,
1560 if (!dst.is(src1)) {
1562 movq(kScratchRegister, src1);
1566 lea(dst, Operand(src1, src2, times_1, 0));
1575 Register src1,
1581 if (dst.is(src1)) {
1586 movq(dst, src1);
1593 src1, Register src2) {
1597 if (!dst.is(src1)) {
1598 movq(dst, src1);
1606 Register src1,
1611 if (dst.is(src1)) {
1613 cmpq(src1, kScratchRegister);
1615 subq(src1, kScratchRegister);
1617 movq(dst, src1);
1625 Register src1,
1629 if (!dst.is(src1)) {
1630 movq(dst, src1);
1638 Register src1,
1644 ASSERT(!src1.is(kScratchRegister));
1647 if (dst.is(src1)) {
1649 movq(kScratchRegister, src1); // Create backup for later testing.
1650 SmiToInteger64(dst, src1);
1665 bind(&failure); // Reused failure exit, restores src1.
1666 movq(src1, kScratchRegister);
1674 SmiToInteger64(dst, src1);
1682 // One of src1 and src2 is zero, the check whether the other is
1684 movq(kScratchRegister, src1);
1693 Register src1,
1697 ASSERT(!src1.is(kScratchRegister));
1702 ASSERT(!src1.is(rdx));
1708 if (src1.is(rax)) {
1709 movq(kScratchRegister, src1);
1711 SmiToInteger32(rax, src1);
1723 if (src1.is(rax)) {
1725 movq(src1, kScratchRegister);
1733 // Sign extend src1 into edx:eax.
1739 if (src1.is(rax)) {
1742 movq(src1, kScratchRegister);
1748 if (!dst.is(src1) && src1.is(rax)) {
1749 movq(src1, kScratchRegister);
1756 Register src1,
1761 ASSERT(!src1.is(kScratchRegister));
1765 ASSERT(!src1.is(rdx));
1766 ASSERT(!src1.is(src2));
1771 if (src1.is(rax)) {
1772 movq(kScratchRegister, src1);
1774 SmiToInteger32(rax, src1);
1785 if (src1.is(rax)) {
1786 movq(src1, kScratchRegister);
1796 if (src1.is(rax)) {
1797 movq(src1, kScratchRegister);
1804 testq(src1, src1);
1825 void MacroAssembler::SmiAnd(Register dst, Register src1, Register src2) {
1827 if (!dst.is(src1)) {
1828 movq(dst, src1);
1848 void MacroAssembler::SmiOr(Register dst, Register src1, Register src2) {
1849 if (!dst.is(src1)) {
1850 ASSERT(!src1.is(src2));
1851 movq(dst, src1);
1869 void MacroAssembler::SmiXor(Register dst, Register src1, Register src2) {
1870 if (!dst.is(src1)) {
1871 ASSERT(!src1.is(src2));
1872 movq(dst, src1);
1936 Register src1,
1940 if (!dst.is(src1)) {
1941 movq(dst, src1);
1951 Register src1,
1956 ASSERT(!src1.is(kScratchRegister));
1959 // dst and src1 can be the same, because the one case that bails out
1960 // is a shift by 0, which leaves dst, and therefore src1, unchanged.
1961 if (src1.is(rcx) || src2.is(rcx)) {
1964 if (!dst.is(src1)) {
1965 movq(dst, src1);
1972 if (src1.is(rcx) || src2.is(rcx)) {
1975 if (src1.is(rcx)) {
1976 movq(src1, kScratchRegister);
1983 // src2 was zero and src1 negative.
1990 Register src1,
1993 ASSERT(!src1.is(kScratchRegister));
1996 if (src1.is(rcx)) {
1997 movq(kScratchRegister, src1);
2001 if (!dst.is(src1)) {
2002 movq(dst, src1);
2008 if (src1.is(rcx)) {
2009 movq(src1, kScratchRegister);
2017 Register src1,
2022 ASSERT(!src1.is(kScratchRegister));
2024 ASSERT(!dst.is(src1));
2029 Condition not_both_smis = NegateCondition(CheckBothSmi(src1, src2));
2036 and_(kScratchRegister, src1);
2043 // kScratchRegister still holds src1 & kSmiTag, which is either zero or one.
2045 // If src1 is a smi, then scratch register all 1s, else it is all 0s.
2046 movq(dst, src1);
2049 // If src1 is a smi, dst holds src1 ^ src2, else it is zero.
2050 xor_(dst, src1);
2051 // If src1 is a smi, dst is src2, else it is src1, i.e., the non-smi.
