Lines Matching refs:UWord
58 static void ocache_sarp_Set_Origins ( Addr, UWord, UInt ); /* fwds */
59 static void ocache_sarp_Clear_Origins ( Addr, UWord ); /* fwds */
179 #define N_PRIMARY_MAP ( ((UWord)1) << N_PRIMARY_BITS)
441 UWord elems_seen = 0;
596 UWord pm_off = a >> 16;
732 UWord sm_off = SM_OFF(a);
740 UWord sm_off = SM_OFF(a);
753 UWord sm_off = SM_OFF(a);
762 UWord sm_off = SM_OFF(a);
768 static UWord get_sec_vbits8(Addr a);
769 static void set_sec_vbits8(Addr a, UWord vbits8);
996 static UWord get_sec_vbits8(Addr a)
1010 static void set_sec_vbits8(Addr a, UWord vbits8)
1051 static INLINE UWord byte_offset_w ( UWord wordszB, Bool bigendian,
1052 UWord byteno ) {
1148 UWord sm_off16 = SM_OFF_16(a);
1149 UWord vabits16 = ((UShort*)(sm->vabits8))[sm_off16];
1159 UWord sm_off = SM_OFF(a);
1160 UWord vabits8 = sm->vabits8[sm_off];
1162 return ((UWord)0xFFFFFFFF00000000ULL | (UWord)V_BITS32_DEFINED);
1164 return ((UWord)0xFFFFFFFF00000000ULL | (UWord)V_BITS32_UNDEFINED);
1283 UWord sm_off16 = SM_OFF_16(a);
1284 UWord vabits16 = ((UShort*)(sm->vabits8))[sm_off16];
1305 UWord sm_off = SM_OFF(a);
1306 UWord vabits8 = sm->vabits8[sm_off];
1349 static void set_address_range_perms ( Addr a, SizeT lenT, UWord
1350 UWord dsm_num )
1352 UWord sm_off, sm_off16;
1353 UWord vabits2 = vabits16 & 0x3;
1978 > Question: why is otag a UInt? Wouldn't a UWord be better? Isn't
1999 Suppose that instead, an otag is a UWord. This would mean that, on
2073 static UWord stats_ocacheL1_find = 0;
2074 static UWord stats_ocacheL1_found_at_1 = 0;
2075 static UWord stats_ocacheL1_found_at_N = 0;
2076 static UWord stats_ocacheL1_misses = 0;
2077 static UWord stats_ocacheL1_lossage = 0;
2078 static UWord stats_ocacheL1_movefwds = 0;
2080 static UWord stats__ocacheL2_refs = 0;
2081 static UWord stats__ocacheL2_misses = 0;
2082 static UWord stats__ocacheL2_n_nodes_max = 0;
2089 static INLINE UWord oc_line_offset ( Addr a ) {
2122 UWord i;
2147 static UWord ocacheL1_event_ctr = 0;
2152 UWord line, set;
2169 static void moveLineForwards ( OCacheSet* set, UWord lineno )
2180 UWord i;
2201 static UWord stats__ocacheL2_n_nodes = 0;
2265 UWord line;
2266 UWord setno = (a >> OC_BITS_PER_LINE) & (OC_N_SETS - 1);
2267 UWord tagmask = ~((1 << OC_BITS_PER_LINE) - 1);
2268 UWord tag = a & tagmask;
2348 UWord setno = (a >> OC_BITS_PER_LINE) & (OC_N_SETS - 1);
2349 UWord tagmask = ~((1 << OC_BITS_PER_LINE) - 1);
2350 UWord tag = a & tagmask;
2371 UWord lineoff = oc_line_offset(a);
2403 UWord sm_off;
2426 UWord lineoff = oc_line_offset(a);
2446 UWord sm_off;
2463 UWord lineoff = oc_line_offset(a);
2487 UWord sm_off16;
2510 UWord lineoff = oc_line_offset(a);
2531 UWord sm_off16;
2548 UWord lineoff = oc_line_offset(a);
3234 static UWord stats__nia_cache_queries = 0;
3235 static UWord stats__nia_cache_misses = 0;
3238 struct { UWord nia0; UWord ecu0; /* nia0 maps to ecu0 */
3239 UWord nia1; UWord ecu1; } /* nia1 maps to ecu1 */
3248 UWord i;
3269 UWord i;
3283 # define SWAP(_w1,_w2) { UWord _t = _w1; _w1 = _w2; _w2 = _t; }
3300 nia_to_ecu_cache[i].ecu0 = (UWord)ecu;
3309 void MC_(helperc_MAKE_STACK_UNINIT) ( Addr base, UWord len, Addr nia )
3312 tl_assert(sizeof(UWord) == sizeof(SizeT));
3370 UWord a_lo = (UWord)(base);
3371 UWord a_hi = (UWord)(base + 128 - 1);
3382 UWord v_off = SM_OFF(a_lo);
3426 UWord a_lo = (UWord)(base);
3427 UWord a_hi = (UWord)(base + 288 - 1);
3438 UWord v_off = SM_OFF(a_lo);
3548 UWord vabits2;
3567 UWord vabits2;
3587 UWord vabits2;
3639 UWord vabits2;
3685 UWord vabits2;
4001 UWord fn ( Addr a )
4008 are a UWord, and for STOREV64 they are a ULong.
4097 UWord sm_off16, vabits16;
4146 UWord sm_off16, vabits16;
4197 UWord mc_LOADV32 ( Addr a, Bool isBigEndian )
4202 return (UWord)mc_LOADVn_slow( a, 32, isBigEndian );
4205 UWord sm_off, vabits8;
4210 return (UWord)mc_LOADVn_slow( a, 32, isBigEndian );
4223 return ((UWord)0xFFFFFFFF00000000ULL | (UWord)V_BITS32_DEFINED);
4225 return ((UWord)0xFFFFFFFF00000000ULL | (UWord)V_BITS32_UNDEFINED);
4229 return (UWord)mc_LOADVn_slow( a, 32, isBigEndian );
4235 VG_REGPARM(1) UWord MC_(helperc_LOADV32be) ( Addr a )
4239 VG_REGPARM(1) UWord MC_(helperc_LOADV32le) ( Addr a )
4246 void mc_STOREV32 ( Addr a, UWord vbits32, Bool isBigEndian )
4254 UWord sm_off, vabits8;
4300 VG_REGPARM(2) void MC_(helperc_STOREV32be) ( Addr a, UWord vbits32 )
4304 VG_REGPARM(2) void MC_(helperc_STOREV32le) ( Addr a, UWord vbits32 )
4313 UWord mc_LOADV16 ( Addr a, Bool isBigEndian )
4318 return (UWord)mc_LOADVn_slow( a, 16, isBigEndian );
4321 UWord sm_off, vabits8;
4326 return (UWord)mc_LOADVn_slow( a, 16, isBigEndian );
4346 return (UWord)mc_LOADVn_slow( a, 16, isBigEndian );
4353 VG_REGPARM(1) UWord MC_(helperc_LOADV16be) ( Addr a )
4357 VG_REGPARM(1) UWord MC_(helperc_LOADV16le) ( Addr a )
4364 void mc_STOREV16 ( Addr a, UWord vbits16, Bool isBigEndian )
4372 UWord sm_off, vabits8;
4411 VG_REGPARM(2) void MC_(helperc_STOREV16be) ( Addr a, UWord vbits16 )
4415 VG_REGPARM(2) void MC_(helperc_STOREV16le) ( Addr a, UWord vbits16 )
4425 UWord MC_(helperc_LOADV8) ( Addr a )
4430 return (UWord)mc_LOADVn_slow( a, 8, False/*irrelevant*/ );
4433 UWord sm_off, vabits8;
4438 return (UWord)mc_LOADVn_slow( a, 8, False/*irrelevant*/ );
4458 return (UWord)mc_LOADVn_slow( a, 8, False/*irrelevant*/ );
4467 void MC_(helperc_STOREV8) ( Addr a, UWord vbits8 )
4475 UWord sm_off, vabits8;
4526 void MC_(helperc_value_check0_fail_w_o) ( UWord origin ) {
4531 void MC_(helperc_value_check1_fail_w_o) ( UWord origin ) {
4536 void MC_(helperc_value_check4_fail_w_o) ( UWord origin ) {
4541 void MC_(helperc_value_check8_fail_w_o) ( UWord origin ) {
4546 void MC_(helperc_value_checkN_fail_w_o) ( HWord sz, UWord origin ) {
4660 tl_assert(sizeof(UWord) == 4 || sizeof(UWord) == 8);
4664 if (sizeof(UWord) == 8) {
4934 " 0x%lx-0x%lx (size %ld)\n", s, e, (UWord)(e-s));
5001 static UWord cgb_size = 0;
5002 static UWord cgb_used = 0;
5014 /*OUT*/UWord* nBlocks )
5024 UWord i, sz_new;
5360 static Bool mc_handle_client_request ( ThreadId tid, UWord* arg, UWord* ret )
5386 *ret = ok ? (UWord)NULL : bad_addr;
5520 UWord** argp = (UWord**)arg;
5535 UWord** argp = (UWord**)arg;
5652 *ret = (UWord) MC_(mempool_exists) ( pool );
5737 UWord VG_REGPARM(1) MC_(helperc_b_load1)( Addr a ) {
5740 UWord lineoff = oc_line_offset(a);
5741 UWord byteoff = a & 3; /* 0, 1, 2 or 3 */
5761 UWord VG_REGPARM(1) MC_(helperc_b_load2)( Addr a ) {
5764 UWord lineoff, byteoff;
5793 UWord VG_REGPARM(1) MC_(helperc_b_load4)( Addr a ) {
5796 UWord lineoff;
5824 UWord VG_REGPARM(1) MC_(helperc_b_load8)( Addr a ) {
5827 UWord lineoff;
5859 UWord VG_REGPARM(1) MC_(helperc_b_load16)( Addr a ) {
5863 return (UWord)oBoth;
5866 UWord VG_REGPARM(1) MC_(helperc_b_load32)( Addr a ) {
5873 return (UWord)oAll;
5881 void VG_REGPARM(2) MC_(helperc_b_store1)( Addr a, UWord d32 ) {
5883 UWord lineoff = oc_line_offset(a);
5884 UWord byteoff = a & 3; /* 0, 1, 2 or 3 */
5900 void VG_REGPARM(2) MC_(helperc_b_store2)( Addr a, UWord d32 ) {
5902 UWord lineoff, byteoff;
5928 void VG_REGPARM(2) MC_(helperc_b_store4)( Addr a, UWord d32 ) {
5930 UWord lineoff;
5954 void VG_REGPARM(2) MC_(helperc_b_store8)( Addr a, UWord d32 ) {
5956 UWord lineoff;
5983 void VG_REGPARM(2) MC_(helperc_b_store16)( Addr a, UWord d32 ) {
5988 void VG_REGPARM(2) MC_(helperc_b_store32)( Addr a, UWord d32 ) {
6001 static void ocache_sarp_Set_Origins ( Addr a, UWord len, UInt otag ) {
6033 static void ocache_sarp_Clear_Origins ( Addr a, UWord len ) {
6251 (UWord)sizeof(OCache),
6451 tl_assert(sizeof(UWord) == sizeof(Addr));
6472 tl_assert(sizeof(UWord) == 4);
6483 tl_assert(sizeof(UWord) == 8);
