Lines Matching full:cmpl
324 cmpl imm8[3] r32.ud[2] => eflags[0x010,0x010]
325 cmpl imm8[2] r32.ud[3] => eflags[0x010,0x000]
326 cmpl imm8[12] r32.ud[12] => eflags[0x044,0x044]
327 cmpl imm8[12] r32.ud[34] => eflags[0x044,0x000]
328 cmpl imm8[34] r32.ud[12] => eflags[0x081,0x081]
329 cmpl imm8[12] r32.ud[34] => eflags[0x081,0x000]
330 cmpl imm8[100] r32.sd[-2147483600] => eflags[0x800,0x800]
331 cmpl imm8[50] r32.sd[-50] => eflags[0x800,0x000]
332 cmpl imm8[-50] r32.sd[50] => eflags[0x800,0x000]
333 cmpl imm8[-100] r32.sd[2147483600] => eflags[0x800,0x800]
334 cmpl imm8[3] m32.ud[2] => eflags[0x010,0x010]
335 cmpl imm8[2] m32.ud[3] => eflags[0x010,0x000]
336 cmpl imm8[12] m32.ud[12] => eflags[0x044,0x044]
337 cmpl imm8[12] m32.ud[34] => eflags[0x044,0x000]
338 cmpl imm8[34] m32.ud[12] => eflags[0x081,0x081]
339 cmpl imm8[12] m32.ud[34] => eflags[0x081,0x000]
340 cmpl imm8[100] m32.sd[-2147483600] => eflags[0x800,0x800]
341 cmpl imm8[50] m32.sd[-50] => eflags[0x800,0x000]
342 cmpl imm8[-50] m32.sd[50] => eflags[0x800,0x000]
343 cmpl imm8[-100] m32.sd[2147483600] => eflags[0x800,0x800]
344 cmpl imm32[3] eax.ud[2] => eflags[0x010,0x010]
345 cmpl imm32[2] eax.ud[3] => eflags[0x010,0x000]
346 cmpl imm32[12] eax.ud[12] => eflags[0x044,0x044]
347 cmpl imm32[12] eax.ud[34] => eflags[0x044,0x000]
348 cmpl imm32[34] eax.ud[12] => eflags[0x081,0x081]
349 cmpl imm32[12] eax.ud[34] => eflags[0x081,0x000]
350 cmpl imm32[100] eax.sd[-2147483600] => eflags[0x800,0x800]
351 cmpl imm32[50] eax.sd[-50] => eflags[0x800,0x000]
352 cmpl imm32[-50] eax.sd[50] => eflags[0x800,0x000]
353 cmpl imm32[-100] eax.sd[2147483600] => eflags[0x800,0x800]
354 cmpl imm32[3] r32.ud[2] => eflags[0x010,0x010]
355 cmpl imm32[2] r32.ud[3] => eflags[0x010,0x000]
356 cmpl imm32[12] r32.ud[12] => eflags[0x044,0x044]
357 cmpl imm32[12] r32.ud[34] => eflags[0x044,0x000]
358 cmpl imm32[34] r32.ud[12] => eflags[0x081,0x081]
359 cmpl imm32[12] r32.ud[34] => eflags[0x081,0x000]
360 cmpl imm32[100] r32.sd[-2147483600] => eflags[0x800,0x800]
361 cmpl imm32[50] r32.sd[-50] => eflags[0x800,0x000]
362 cmpl imm32[-50] r32.sd[50] => eflags[0x800,0x000]
363 cmpl imm32[-100] r32.sd[2147483600] => eflags[0x800,0x800]
364 cmpl imm32[3] m32.ud[2] => eflags[0x010,0x010]
365 cmpl imm32[2] m32.ud[3] => eflags[0x010,0x000]
366 cmpl imm32[12] m32.ud[12] => eflags[0x044,0x044]
367 cmpl imm32[12] m32.ud[34] => eflags[0x044,0x000]
368 cmpl imm32[34] m32.ud[12] => eflags[0x081,0x081]
369 cmpl imm32[12] m32.ud[34] => eflags[0x081,0x000]
370 cmpl imm32[100] m32.sd[-2147483600] => eflags[0x800,0x800]
371 cmpl imm32[50] m32.sd[-50] => eflags[0x800,0x000]
372 cmpl imm32[-50] m32.sd[50] => eflags[0x800,0x000]
373 cmpl imm32[-100] m32.sd[2147483600] => eflags[0x800,0x800]
374 cmpl r32.ud[3] r32.ud[2] => eflags[0x010,0x010]
375 cmpl r32.ud[2] r32.ud[3] => eflags[0x010,0x000]
376 cmpl r32.ud[12] r32.ud[12] => eflags[0x044,0x044]
377 cmpl r32.ud[12] r32.ud[34] => eflags[0x044,0x000]
378 cmpl r32.ud[34] r32.ud[12] => eflags[0x081,0x081]
379 cmpl r32.ud[12] r32.ud[34] => eflags[0x081,0x000]
380 cmpl r32.ud[100] r32.sd[-2147483600] => eflags[0x800,0x800]
381 cmpl r32.ud[50] r32.sd[-50] => eflags[0x800,0x000]
382 cmpl r32.sd[-50] r32.sd[50] => eflags[0x800,0x000]
383 cmpl r32.sd[-100] r32.sd[2147483600] => eflags[0x800,0x800]
384 cmpl r32.ud[3] m32.ud[2] => eflags[0x010,0x010]
385 cmpl r32.ud[2] m32.ud[3] => eflags[0x010,0x000]
386 cmpl r32.ud[12] m32.ud[12] => eflags[0x044,0x044]
387 cmpl r32.ud[12] m32.ud[34] => eflags[0x044,0x000]
388 cmpl r32.ud[34] m32.ud[12] => eflags[0x081,0x081]
389 cmpl r32.ud[12] m32.ud[34] => eflags[0x081,0x000]
390 cmpl r32.ud[100] m32.sd[-2147483600] => eflags[0x800,0x800]
391 cmpl r32.ud[50] m32.sd[-50] => eflags[0x800,0x000]
392 cmpl r32.sd[-50] m32.sd[50] => eflags[0x800,0x000]
393 cmpl r32.sd[-100] m32.sd[2147483600] => eflags[0x800,0x800]
394 cmpl m32.ud[3] r32.ud[2] => eflags[0x010,0x010]
395 cmpl m32.ud[2] r32.ud[3] => eflags[0x010,0x000]
396 cmpl m32.ud[12] r32.ud[12] => eflags[0x044,0x044]
397 cmpl m32.ud[12] r32.ud[34] => eflags[0x044,0x000]
398 cmpl m32.ud[34] r32.ud[12] => eflags[0x081,0x081]
399 cmpl m32.ud[12] r32.ud[34] => eflags[0x081,0x000]
400 cmpl m32.ud[100] r32.sd[-2147483600] => eflags[0x800,0x800]
401 cmpl m32.ud[50] r32.sd[-50] => eflags[0x800,0x000]
402 cmpl m32.sd[-50] r32.sd[50] => eflags[0x800,0x000]
403 cmpl m32.sd[-100] r32.sd[2147483600] => eflags[0x800,0x800]
