Lines Matching full:makefile
96 * Conditionals:: Use or ignore parts of the makefile based
105 * Makefile Conventions:: Conventions for writing makefiles for
109 * Complex Makefile:: A real example of a straightforward,
110 but nontrivial, makefile.
128 * Simple Makefile:: A Simple Makefile
129 * How Make Works:: How @code{make} Processes This Makefile
132 * Combine By Prerequisite:: Another Style of Makefile
137 * Makefile Contents:: What makefiles contain.
138 * Makefile Names:: How to name your makefile.
139 * Include:: How one makefile can use another makefile.
144 * Overriding Makefiles:: How to override part of one makefile
145 with another makefile.
233 * Setting:: How to set a variable in the makefile.
236 * Override Directive:: How to set a variable in the makefile even if
267 * Eval Function:: Evaluate the arguments as makefile syntax.
275 * Makefile Arguments:: How to specify which makefile to use.
277 parts of the makefile to use.
280 in the makefile other than simply
364 the @dfn{makefile} that describes the relationships among files
369 Once a suitable makefile exists, each time you change some source files,
378 uses the makefile data base and the last-modification times of the files to
429 to the smallest possible makefile that reproduces the problem. Then
430 send us the makefile and the exact results @code{make} gave you,
433 When generating this small makefile, be sure to not use any non-free
465 You need a file called a @dfn{makefile} to tell @code{make} what to do.
466 Most often, the makefile tells @code{make} how to compile and link a
468 @cindex makefile
470 In this chapter, we will discuss a simple makefile that describes how to
472 and three header files. The makefile can also tell @code{make} how to
475 of a makefile, see @ref{Complex Makefile}.
489 * Simple Makefile:: A Simple Makefile
490 * How Make Works:: How @code{make} Processes This Makefile
493 * Combine By Prerequisite:: Another Style of Makefile
497 @node Rule Introduction, Simple Makefile, Introduction, Introduction
501 @cindex makefile rule parts
502 @cindex parts of makefile rule
504 A simple makefile consists of ``rules'' with the following shape:
544 A makefile may contain other text besides rules, but a simple makefile
548 @node Simple Makefile, How Make Works, Rule Introduction, Introduction
549 @section A Simple Makefile
550 @cindex simple makefile
551 @cindex makefile, simple
553 Here is a straightforward makefile that describes the way an
596 @cindex quoting newline, in makefile
597 @cindex newline, quoting, in makefile
599 To use this makefile to create the executable file called @file{edit},
606 To use this makefile to delete the executable file and all the object
613 In the example makefile, the targets include the executable file
629 distinguish command lines from other lines in the makefile. (Bear in
651 @node How Make Works, Variables Simplify, Simple Makefile, Introduction
653 @section How @code{make} Processes a Makefile
654 @cindex processing a makefile
655 @cindex makefile, how @code{make} processes
679 @code{make} reads the makefile in the current directory and begins by
697 prerequisites, the source file and header files. This makefile does not
736 the risk and simplify the makefile by using a variable. @dfn{Variables}
745 It is standard practice for every makefile to have a variable named
749 makefile:@refill
763 Here is how the complete simple makefile looks when you use a variable
839 This is how we would write the makefile in actual practice. (The
847 @section Another Style of Makefile
850 When the objects of a makefile are created only by implicit rules, an
851 alternative style of makefile is possible. In this style of makefile,
918 makefile, because we do not want it to run by default! Thus, in the
919 example makefile, we want the rule for @code{edit}, which recompiles
930 @cindex makefile, how to write
932 reading a data base called the @dfn{makefile}.
935 * Makefile Contents:: What makefiles contain.
936 * Makefile Names:: How to name your makefile.
937 * Include:: How one makefile can use another makefile.
942 * Overriding Makefiles:: How to override part of one makefile
943 with another makefile.
948 @node Makefile Contents, Makefile Names, Makefiles, Makefiles
978 simple makefile example shows a variable definition for @code{objects}
985 reading the makefile. These include:
989 Reading another makefile (@pxref{Include, ,Including Other Makefiles}).
993 ignore a part of the makefile (@pxref{Conditionals, ,Conditional Parts of Makefiles}).
1000 @cindex comments, in makefile
1001 @cindex @code{#} (comments), in makefile
1003 @samp{#} in a line of a makefile starts a @dfn{comment}. It and the
1009 appear on any line in the makefile, although they are treated
1024 @node Makefile Names, Include, Makefile Contents, Makefiles
1025 @section What Name to Give Your Makefile
1026 @cindex makefile name
1027 @cindex name of makefile
1028 @cindex default makefile name
1029 @cindex file name of makefile
1032 By default, when @code{make} looks for the makefile, it tries the
1033 following names, in order: @file{GNUmakefile}, @file{makefile}
1034 and @file{Makefile}.@refill
1035 @findex Makefile
1037 @findex makefile
1040 Normally you should call your makefile either @file{makefile} or
1041 @file{Makefile}. (We recommend @file{Makefile} because it appears
1045 use this name if you have a makefile that is specific to GNU
1047 @code{make}. Other @code{make} programs look for @file{makefile} and
1048 @file{Makefile}, but not @file{GNUmakefile}.
1050 If @code{make} finds none of these names, it does not use any makefile.
1057 @cindex @code{--makefile}
1058 If you want to use a nonstandard name for your makefile, you can specify
1059 the makefile name with the @samp{-f} or @samp{--file} option. The
1061 @code{make} to read the file @var{name} as the makefile. If you use
1064 specified. The default makefile names @file{GNUmakefile},
1065 @file{makefile} and @file{Makefile} are not checked automatically if you
1067 @cindex specifying makefile name
1068 @cindex makefile name, how to specify
1069 @cindex name of makefile, how to specify
1070 @cindex file name of makefile, how to specify
1072 @node Include, MAKEFILES Variable, Makefile Names, Makefiles
1075 @cindex makefile, including
1079 current makefile and read one or more other makefiles before continuing.
1080 The directive is a line in the makefile that looks like this:
1117 reading of the containing makefile and reads from each listed file in
1119 makefile in which the directive appears.
1129 is included by the main makefile. This practice is generally cleaner
1131 makefile as has been traditionally done with other versions of
1158 If an included makefile cannot be found in any of these directories, a
1160 processing of the makefile containing the @code{include} continues.
1164 Only after it has tried to find a way to remake a makefile and failed,
1165 will @code{make} diagnose the missing makefile as a fatal error.
1167 If you want @code{make} to simply ignore a makefile which does not exist
1182 @cindex makefile, and @code{MAKEFILES} variable
1199 usually better not to mess with a makefile from outside. However, if
1200 you are running @code{make} without a specific makefile, a makefile in
1223 This means that if the first thing a makefile does is examine the last
1224 word in this variable, it will be the name of the current makefile.
1225 Once the current makefile has used @code{include}, however, the last
1226 word will be the just-included makefile.
1228 If a makefile named @code{Makefile} has this content:
1249 name1 = Makefile
1267 if they are set by a makefile or on the command line.
1305 This makefile prints:
1342 @c mentioned in the makefile to be listed in this variable, even if it
1395 @cindex makefile, remaking of
1397 files. If a makefile can be remade from other files, you probably want
1398 @code{make} to get an up-to-date version of the makefile to read in.
1401 each as a goal target and attempt to update it. If a makefile has a
1402 rule which says how to update it (found either in that very makefile or
1415 explicit rule with the makefile as the target, and an empty command
1420 (@pxref{Double-Colon}). In the case of makefiles, a makefile that has a
1424 @code{make} would constantly remake the makefile, and never do anything
1430 @samp{--file} options, @code{make} will try the default makefile names;
1431 @pxref{Makefile Names, ,What Name to Give Your Makefile}. Unlike
1434 if a default makefile does not exist but can be created by running
1436 makefile can be used.
1440 (@pxref{Makefile Names, ,What Name to Give Your Makefile})
1442 that it is not an error if @code{make} cannot find or make any makefile;
1443 a makefile is not always necessary.@refill
1447 you would not want to use an out-of-date makefile to decide which
1452 out-of-date makefile would result in the wrong output for other targets.
1461 makefile name is specified explicitly as a goal, the options @samp{-t}
1464 Thus, @samp{make -f mfile -n mfile foo} would read the makefile
1471 @section Overriding Part of Another Makefile
1474 @cindex makefile, overriding
1475 Sometimes it is useful to have a makefile that is mostly just like
1476 another makefile. You can often use the @samp{include} directive to
1482 In the containing makefile (the one that wants to include the other),
1485 makefile, @code{make} should look in another makefile.
1488 For example, if you have a makefile called @file{Makefile} that says how
1490 makefile called @file{GNUmakefile} that contains:
1497 @@$(MAKE) -f Makefile $@@
1505 commands from the pattern rule: @samp{make -f Makefile bar}. If
1506 @file{Makefile} provides a rule for updating @file{bar}, @code{make}
1519 @section How @code{make} Reads a Makefile
1521 @cindex makefile, parsing
1535 constructs within the makefile. We say that expansion is
1538 construct as the makefile is parsed. We say that expansion is
1613 (@pxref{Reading Makefiles, , How @code{make} Reads a Makefile}). GNU
1615 prerequisites (only) for some or all targets defined in the makefile.
1628 variable or function reference in the makefile. In this case the
1631 consider this makefile:
1749 Rules undergo secondary expansion in makefile order, except that
1814 A @dfn{rule} appears in the makefile and says when and how to remake
1824 rule in the first makefile. If the first rule has multiple targets,
1831 Therefore, we usually write the makefile so that the first rule is the
1833 the makefile (often with a target called @samp{all}).
1945 the length of a line in a makefile.
2068 following rule in the makefile, @samp{make print} will print all the
2180 This string, used anywhere in a makefile, is replaced by a
2206 Thus, a makefile to compile all C source files in the directory and then
2371 appear in the makefile; multiple directives with the same pattern are
2415 If a target file does not exist at the path specified in the makefile,
2439 target is rebuilt using the file name specified in the makefile. In
2523 @file{foo.c} exists (or is mentioned in the makefile) in any of the
2655 makefile will often contain a variable which lists a number of
2712 makefile @file{./Makefile}. Since the target remade by default will be the
2713 first one in the makefile, it is common to make this a phony target named
2904 makefile, then all prerequisite lists defined @emph{after} it appears
2917 makefile, then @code{make} will delete the target of a rule if it has
2931 this affects every command in the makefile, it is not very useful; we
3001 parallel (unless its makefile contains this target). Any prerequisites
3098 defined in different parts of your makefile; you can use
3334 in the makefile. However, the cases where double-colon rules really make
3352 In the makefile for a program, many of the rules you need to write often
3365 makefile. And, you must always be very careful to update the makefile
3391 makefile, so it can never be considered an intermediate file by implicit
3400 makefile could use @code{include} to read them in (@pxref{Include}).
3404 regenerate the prerequisites, because it always regenerates any makefile
3408 one makefile corresponding to each source file. For each source file
3409 @file{@var{name}.c} there is a makefile @file{@var{name}.d} which lists
3414 Here is the pattern rule to generate a file of prerequisites (i.e., a makefile)
3499 always interpreted by @file{/bin/sh} unless the makefile specifies
3520 syntaxes in one file. Most of the makefile uses @code{make} syntax
3529 semicolon in between. @emph{Any} line in the makefile that begins
3581 makefile syntax, a single command can be split into multiple lines in
3582 the makefile by placing a backslash before each newline. A sequence
3587 makefile, backslash-newline pairs are @emph{not} removed from the
3594 For example, this makefile:
3622 As a more complex example, this makefile:
3707 semantics to references elsewhere in the makefile. They also have the
3763 the makefile:
3786 started with @samp{@@}. A rule in the makefile for the special target
3840 If this variable is not set in your makefile, the program
3851 Furthermore, when you do set @code{SHELL} in your makefile that value
3898 example, if the makefile specifies @samp{SHELL = /bin/sh}, @code{make}
3923 where @code{SHELL} is set from the Makefile; if it is set in the
3927 The effect of the above DOS-specific processing is that a Makefile that
4068 makefile for the special target @code{.IGNORE} has the same effect, if
4162 makefile. This technique is useful when you want separate makefiles for
4164 have a subdirectory @file{subdir} which has its own makefile, and you would
4165 like the containing directory's makefile to run @code{make} on the
4197 set in the makefile (by default, an environment variable @code{CURDIR}
4228 @code{make} to run the top-level makefile, the same special version will be
4279 override what is specified in the makefile used by the sub-@code{make}
4280 makefile unless you use the @samp{-e} switch (@pxref{Options Summary,
4420 by itself earlier (in an included makefile, perhaps). You
4437 way you can write a makefile that behaves one way if run recursively and
4444 the outer-level makefile, is passed down through the environment; then
4544 in the makefile. You probably do not care about this.)
4574 a makefile, to specify additional flags that should also be in effect for
4575 that makefile. (Note that you cannot use @code{MFLAGS} this way. That
4580 environment or from a makefile), it first prepends a hyphen if the value
4778 A @dfn{variable} is a name defined in a makefile to represent a string
4781 and other parts of the makefile. (In some other versions of @code{make},
4785 Variables and functions in all parts of a makefile are expanded when
4807 purposes in the makefile, and reserving upper case for parameters that
4820 * Setting:: How to set a variable in the makefile.
4823 * Override Directive:: How to set a variable in the makefile even if
5015 Simply expanded variables generally make complicated makefile programming
5160 sophisticated makefile programming. For most purposes you need not
5339 used together in complex ways when doing makefile programming.@refill
5354 You can specify a value in the makefile, either
5380 To set a variable from the makefile, write a line starting with the
5404 affect the functioning of @code{make}, but it will make the makefile easier
5572 then ordinary assignments in the makefile are ignored. If you want to set
5573 the variable in the makefile even though it was set with a command
5640 sections of makefile syntax to use with @code{eval} (@pxref{Eval Function}).
5707 same name and value. However, an explicit assignment in the makefile,
5710 assignments in the makefile. @xref{Options Summary, ,Summary of
5716 because you know that no makefile will use them for other things. (Note
5721 makefile are placed into the environment of that command. This allows
5732 different results from the same makefile. This is against the whole
5791 Target-specific variables have the same priority as any other makefile
5835 which they were defined in the makefile, and collected together into
5874 A @dfn{conditional} causes part of a makefile to be obeyed or ignored
5878 ``sees'' in the makefile, so they @emph{cannot} be used to control shell
5915 then they are compared. The lines of the makefile following the
5925 end with an @code{endif}. Unconditional makefile text follows.
5928 the lines of the conditional are treated as part of the makefile, or
5930 units of the makefile, such as rules, may cross the beginning or the
5985 of the makefile if the condition is true. If the condition is false, no
6134 Conditionals affect which lines of the makefile @code{make} uses. If
6136 @var{text-if-true} as part of the makefile; if the condition is false,
6138 units of the makefile, such as rules, may safely be split across the
6141 @code{make} evaluates conditionals when it reads a makefile.
6147 conditional in one makefile and end it in another. However, you may
6188 @dfn{Functions} allow you to do text processing in the makefile to compute
6192 function's processing is substituted into the makefile at the point of the
6203 * Eval Function:: Evaluate the arguments as makefile syntax.
6587 @code{patsubst}. Suppose that a makefile uses the @code{VPATH} variable
6809 functional context (as opposed to the GNU @code{make} makefile
7057 makefile:
7082 @cindex evaluating makefile syntax
7083 @cindex makefile syntax, evaluating
7086 makefile constructs that are not constant; which are the result of
7089 are parsed as makefile syntax. The expanded results can define new
7093 thus, it can be placed virtually anywhere in a makefile without
7098 that expansion are expanded again when they are parsed as makefile
7110 ``generic'' part of this example into another makefile, then include
7193 if @var{variable} was defined in a makefile.
7202 makefile (@pxref{Override Directive, ,The @code{override} Directive}).
7213 suppose you have a makefile @file{foo} that includes another makefile
7317 @code{make} Reads a Makefile}). Because this function involves
7349 provide information to the user of the makefile or to cause make to stop
7372 makefile if the
7392 and the resulting message is displayed, but processing of the makefile
7401 to standard output. No makefile name or line number is added. The
7408 A makefile that says how to recompile a program can be used in more
7435 * Makefile Arguments:: How to specify which makefile to use.
7437 parts of the makefile to use.
7440 in the makefile other than simply
7450 @node Makefile Arguments, Goals, Running, Running
7451 @section Arguments to Specify the Makefile
7453 @cindex @code{--makefile}
7456 The way to specify the name of the makefile is with the @samp{-f} or
7457 @samp{--file} option (@samp{--makefile} also works). For example,
7458 @samp{-f altmake} says to use the file @file{altmake} as the makefile.
7465 to try @file{GNUmakefile}, @file{makefile}, and @file{Makefile}, in
7469 @node Goals, Instead of Execution, Makefile Arguments, Running
7477 By default, the goal is the first target in the makefile (not counting
7480 programs they describe. If the first rule in the makefile has several
7483 within your makefile using the @code{.DEFAULT_GOAL} variable
7491 Any target in the makefile may be specified as a goal (unless it
7494 targets not in the makefile may be specified, if @code{make} can find
7521 several programs, with a makefile that starts like this:
7534 a rule in the makefile but is not a prerequisite of the default goal.
7548 Make all the top-level targets the makefile knows about.
7570 even if the makefile itself cannot create these files.
7604 Perform self tests on the program this makefile builds.
7612 The makefile tells @code{make} how to tell whether a target is up to date,
7780 variable in the makefile are ignored; we say they have been
7784 compilers. For example, in a properly written makefile, the variable
7793 that occurs. The makefile
7811 You can also program the makefile to look at additional variables of your
7813 makefile works by changing the variables.
7823 There is one way that the makefile can change a variable that you have
7947 @item m (@i{makefile})
7966 @itemx --makefile=@var{file}
7967 @cindex @code{--makefile}
7968 Read the file named @var{file} as a makefile.
8159 executing the makefile. This may be useful for tracking down errors
8265 For example, suppose the makefile looks like this:
8292 Of course, when you write the makefile, you know which implicit rule you
8300 the makefile as a target or a prerequisite, or if an implicit rule can be
8338 available unless the makefile explicitly overrides or cancels them.
8347 @code{make}, run @samp{make -p} in a directory with no makefile.
8523 knows this by mentioning @file{@var{n}.r} in the makefile. Or, if you
8648 the makefile, with arguments to @code{make}, or in the environment to
8870 If the file @file{@var{n}.c} exists, or is mentioned in the makefile, no
8884 mentioned in the makefile, along with the implicit rule that says how to
8907 makefile as a target or prerequisite. However, you can explicitly mark a
8964 when the makefile is read. @xref{Using Variables, , How to Use
9039 The order in which pattern rules appear in the makefile is important
9190 duplicated in the order they were listed in the makefile. This is
9372 Suppose the makefile mentions @file{foo.c}. For this target, @code{make}
9470 For example, when testing a makefile, you might not care if the source
9505 You can use a last-resort rule to override part of another makefile.
9506 @xref{Overriding Makefiles, , Overriding Part of Another Makefile}.
9664 file name is mentioned in the makefile as a target or as an explicit
9801 commands to be run, even without a makefile:
9817 it may be useful in a makefile to pretend that it does. If you write an
10008 they do in the makefile, except for the stripping of initial
10189 @node Missing, Makefile Conventions, Features, Top
10295 @comment The makefile standards are in a separate file that is also
10299 @node Quick Reference, Error Messages, Makefile Conventions, Top
10328 makefile.@*
10335 Include another makefile.@*
10514 Evaluate @var{text} then read the results as makefile commands.
10601 You can set @code{SHELL} in the makefile to change the shell used to run
10626 a makefile to set flags.@*
10657 @node Error Messages, Complex Makefile, Quick Reference, Top
10671 (usually @samp{make}), or, if the error is found in a makefile, the name
10687 but the rule in the makefile was prefixed with the @code{-} special
10708 This means the first thing in the makefile seems to be part of a command
10720 then couldn't find any instructions in the makefile on how to do that,
10724 makefile describing how that target can be built. Other possible
10725 sources of this problem are typos in the makefile (if that filename is
10729 @item No targets specified and no makefile found. Stop.
10733 The latter means that some makefile was found, but it didn't contain any
10736 @xref{Makefile Arguments, ,Arguments to Specify the Makefile}.@refill
10738 @item Makefile `@var{xxx}' was not found.
10739 @itemx Included makefile `@var{xxx}' was not found.
10740 A makefile specified on the command line (first form) or included
10802 Variable Works}). If the makefile is constructed such that the parent
10810 @node Complex Makefile, GNU Free Documentation License, Error Messages, Top
10811 @appendix Complex Makefile Example
10813 Here is the makefile for the GNU @code{tar} program. This is a
10814 moderately complex makefile.
10817 interesting feature of this makefile is that @file{testpad.h} is a
10835 @file{TAGS}, @file{Makefile}, and @file{config.status} files.
10836 (Although it is not evident, this makefile (and
10850 # Generated automatically from Makefile.in by configure.
10851 # Un*x Makefile for GNU tar program.
10976 AUX = README COPYING ChangeLog Makefile.in \
10977 makefile.pc configure configure.in \
11042 rm -f TAGS Makefile config.status
