Home | History | Annotate | Download | only in Target
      1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file defines the TargetMachine and LLVMTargetMachine classes.
     11 //
     12 //===----------------------------------------------------------------------===//
     13 
     14 #ifndef LLVM_TARGET_TARGETMACHINE_H
     15 #define LLVM_TARGET_TARGETMACHINE_H
     16 
     17 #include "llvm/ADT/StringRef.h"
     18 #include "llvm/Pass.h"
     19 #include "llvm/Support/CodeGen.h"
     20 #include "llvm/Target/TargetOptions.h"
     21 #include <cassert>
     22 #include <string>
     23 
     24 namespace llvm {
     25 
     26 class InstrItineraryData;
     27 class JITCodeEmitter;
     28 class GlobalValue;
     29 class MCAsmInfo;
     30 class MCCodeGenInfo;
     31 class MCContext;
     32 class PassManagerBase;
     33 class Target;
     34 class DataLayout;
     35 class TargetLibraryInfo;
     36 class TargetFrameLowering;
     37 class TargetInstrInfo;
     38 class TargetIntrinsicInfo;
     39 class TargetJITInfo;
     40 class TargetLowering;
     41 class TargetPassConfig;
     42 class TargetRegisterInfo;
     43 class TargetSelectionDAGInfo;
     44 class TargetSubtargetInfo;
     45 class ScalarTargetTransformInfo;
     46 class VectorTargetTransformInfo;
     47 class formatted_raw_ostream;
     48 class raw_ostream;
     49 
     50 //===----------------------------------------------------------------------===//
     51 ///
     52 /// TargetMachine - Primary interface to the complete machine description for
     53 /// the target machine.  All target-specific information should be accessible
     54 /// through this interface.
     55 ///
     56 class TargetMachine {
     57   TargetMachine(const TargetMachine &) LLVM_DELETED_FUNCTION;
     58   void operator=(const TargetMachine &) LLVM_DELETED_FUNCTION;
     59 protected: // Can only create subclasses.
     60   TargetMachine(const Target &T, StringRef TargetTriple,
     61                 StringRef CPU, StringRef FS, const TargetOptions &Options);
     62 
     63   /// TheTarget - The Target that this machine was created for.
     64   const Target &TheTarget;
     65 
     66   /// TargetTriple, TargetCPU, TargetFS - Triple string, CPU name, and target
     67   /// feature strings the TargetMachine instance is created with.
     68   std::string TargetTriple;
     69   std::string TargetCPU;
     70   std::string TargetFS;
     71 
     72   /// CodeGenInfo - Low level target information such as relocation model.
     73   const MCCodeGenInfo *CodeGenInfo;
     74 
     75   /// AsmInfo - Contains target specific asm information.
     76   ///
     77   const MCAsmInfo *AsmInfo;
     78 
     79   unsigned MCRelaxAll : 1;
     80   unsigned MCNoExecStack : 1;
     81   unsigned MCSaveTempLabels : 1;
     82   unsigned MCUseLoc : 1;
     83   unsigned MCUseCFI : 1;
     84   unsigned MCUseDwarfDirectory : 1;
     85 
     86 public:
     87   virtual ~TargetMachine();
     88 
     89   const Target &getTarget() const { return TheTarget; }
     90 
     91   const StringRef getTargetTriple() const { return TargetTriple; }
     92   const StringRef getTargetCPU() const { return TargetCPU; }
     93   const StringRef getTargetFeatureString() const { return TargetFS; }
     94 
     95   /// getSubtargetImpl - virtual method implemented by subclasses that returns
     96   /// a reference to that target's TargetSubtargetInfo-derived member variable.
     97   virtual const TargetSubtargetInfo *getSubtargetImpl() const { return 0; }
     98 
     99   mutable TargetOptions Options;
    100 
    101   /// \brief Reset the target options based on the function's attributes.
    102   void resetTargetOptions(const MachineFunction *MF) const;
    103 
    104   // Interfaces to the major aspects of target machine information:
    105   //
    106   // -- Instruction opcode and operand information
    107   // -- Pipelines and scheduling information
    108   // -- Stack frame information
    109   // -- Selection DAG lowering information
    110   //
    111   // N.B. These objects may change during compilation. It's not safe to cache
    112   // them between functions.
    113   virtual const TargetInstrInfo         *getInstrInfo() const { return 0; }
    114   virtual const TargetFrameLowering *getFrameLowering() const { return 0; }
    115   virtual const TargetLowering    *getTargetLowering() const { return 0; }
    116   virtual const TargetSelectionDAGInfo *getSelectionDAGInfo() const{ return 0; }
    117   virtual const DataLayout             *getDataLayout() const { return 0; }
    118 
    119   /// getMCAsmInfo - Return target specific asm information.
    120   ///
    121   const MCAsmInfo *getMCAsmInfo() const { return AsmInfo; }
    122 
    123   /// getSubtarget - This method returns a pointer to the specified type of
    124   /// TargetSubtargetInfo.  In debug builds, it verifies that the object being
    125   /// returned is of the correct type.
    126   template<typename STC> const STC &getSubtarget() const {
    127     return *static_cast<const STC*>(getSubtargetImpl());
    128   }
    129 
    130   /// getRegisterInfo - If register information is available, return it.  If
    131   /// not, return null.  This is kept separate from RegInfo until RegInfo has
    132   /// details of graph coloring register allocation removed from it.
    133   ///
    134   virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
    135 
    136   /// getIntrinsicInfo - If intrinsic information is available, return it.  If
    137   /// not, return null.
    138   ///
    139   virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; }
    140 
    141   /// getJITInfo - If this target supports a JIT, return information for it,
    142   /// otherwise return null.
    143   ///
    144   virtual TargetJITInfo *getJITInfo() { return 0; }
    145 
    146   /// getInstrItineraryData - Returns instruction itinerary data for the target
    147   /// or specific subtarget.
    148   ///
    149   virtual const InstrItineraryData *getInstrItineraryData() const {
    150     return 0;
    151   }
    152 
    153   /// hasMCRelaxAll - Check whether all machine code instructions should be
    154   /// relaxed.
    155   bool hasMCRelaxAll() const { return MCRelaxAll; }
    156 
    157   /// setMCRelaxAll - Set whether all machine code instructions should be
    158   /// relaxed.
    159   void setMCRelaxAll(bool Value) { MCRelaxAll = Value; }
    160 
    161   /// hasMCSaveTempLabels - Check whether temporary labels will be preserved
    162   /// (i.e., not treated as temporary).
    163   bool hasMCSaveTempLabels() const { return MCSaveTempLabels; }
    164 
    165   /// setMCSaveTempLabels - Set whether temporary labels will be preserved
    166   /// (i.e., not treated as temporary).
    167   void setMCSaveTempLabels(bool Value) { MCSaveTempLabels = Value; }
    168 
    169   /// hasMCNoExecStack - Check whether an executable stack is not needed.
    170   bool hasMCNoExecStack() const { return MCNoExecStack; }
    171 
    172   /// setMCNoExecStack - Set whether an executabel stack is not needed.
    173   void setMCNoExecStack(bool Value) { MCNoExecStack = Value; }
    174 
    175   /// hasMCUseLoc - Check whether we should use dwarf's .loc directive.
    176   bool hasMCUseLoc() const { return MCUseLoc; }
    177 
    178   /// setMCUseLoc - Set whether all we should use dwarf's .loc directive.
    179   void setMCUseLoc(bool Value) { MCUseLoc = Value; }
    180 
    181   /// hasMCUseCFI - Check whether we should use dwarf's .cfi_* directives.
    182   bool hasMCUseCFI() const { return MCUseCFI; }
    183 
    184   /// setMCUseCFI - Set whether all we should use dwarf's .cfi_* directives.
    185   void setMCUseCFI(bool Value) { MCUseCFI = Value; }
    186 
    187   /// hasMCUseDwarfDirectory - Check whether we should use .file directives with
    188   /// explicit directories.
    189   bool hasMCUseDwarfDirectory() const { return MCUseDwarfDirectory; }
    190 
    191   /// setMCUseDwarfDirectory - Set whether all we should use .file directives
    192   /// with explicit directories.
    193   void setMCUseDwarfDirectory(bool Value) { MCUseDwarfDirectory = Value; }
    194 
    195   /// getRelocationModel - Returns the code generation relocation model. The
    196   /// choices are static, PIC, and dynamic-no-pic, and target default.
    197   Reloc::Model getRelocationModel() const;
    198 
    199   /// getCodeModel - Returns the code model. The choices are small, kernel,
    200   /// medium, large, and target default.
    201   CodeModel::Model getCodeModel() const;
    202 
    203   /// getTLSModel - Returns the TLS model which should be used for the given
    204   /// global variable.
    205   TLSModel::Model getTLSModel(const GlobalValue *GV) const;
    206 
    207   /// getOptLevel - Returns the optimization level: None, Less,
    208   /// Default, or Aggressive.
    209   CodeGenOpt::Level getOptLevel() const;
    210 
    211   void setFastISel(bool Enable) { Options.EnableFastISel = Enable; }
    212 
    213   bool shouldPrintMachineCode() const { return Options.PrintMachineCode; }
    214 
    215   /// getAsmVerbosityDefault - Returns the default value of asm verbosity.
    216   ///
    217   static bool getAsmVerbosityDefault();
    218 
    219   /// setAsmVerbosityDefault - Set the default value of asm verbosity. Default
    220   /// is false.
    221   static void setAsmVerbosityDefault(bool);
    222 
    223   /// getDataSections - Return true if data objects should be emitted into their
    224   /// own section, corresponds to -fdata-sections.
    225   static bool getDataSections();
    226 
    227   /// getFunctionSections - Return true if functions should be emitted into
    228   /// their own section, corresponding to -ffunction-sections.
    229   static bool getFunctionSections();
    230 
    231   /// setDataSections - Set if the data are emit into separate sections.
    232   static void setDataSections(bool);
    233 
    234   /// setFunctionSections - Set if the functions are emit into separate
    235   /// sections.
    236   static void setFunctionSections(bool);
    237 
    238   /// \brief Register analysis passes for this target with a pass manager.
    239   virtual void addAnalysisPasses(PassManagerBase &) {}
    240 
    241   /// CodeGenFileType - These enums are meant to be passed into
    242   /// addPassesToEmitFile to indicate what type of file to emit, and returned by
    243   /// it to indicate what type of file could actually be made.
    244   enum CodeGenFileType {
    245     CGFT_AssemblyFile,
    246     CGFT_ObjectFile,
    247     CGFT_Null         // Do not emit any output.
    248   };
    249 
    250   /// addPassesToEmitFile - Add passes to the specified pass manager to get the
    251   /// specified file emitted.  Typically this will involve several steps of code
    252   /// generation.  This method should return true if emission of this file type
    253   /// is not supported, or false on success.
    254   virtual bool addPassesToEmitFile(PassManagerBase &,
    255                                    formatted_raw_ostream &,
    256                                    CodeGenFileType,
    257                                    bool /*DisableVerify*/ = true,
    258                                    AnalysisID /*StartAfter*/ = 0,
    259                                    AnalysisID /*StopAfter*/ = 0) {
    260     return true;
    261   }
    262 
    263   /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
    264   /// get machine code emitted.  This uses a JITCodeEmitter object to handle
    265   /// actually outputting the machine code and resolving things like the address
    266   /// of functions.  This method returns true if machine code emission is
    267   /// not supported.
    268   ///
    269   virtual bool addPassesToEmitMachineCode(PassManagerBase &,
    270                                           JITCodeEmitter &,
    271                                           bool /*DisableVerify*/ = true) {
    272     return true;
    273   }
    274 
    275   /// addPassesToEmitMC - Add passes to the specified pass manager to get
    276   /// machine code emitted with the MCJIT. This method returns true if machine
    277   /// code is not supported. It fills the MCContext Ctx pointer which can be
    278   /// used to build custom MCStreamer.
    279   ///
    280   virtual bool addPassesToEmitMC(PassManagerBase &,
    281                                  MCContext *&,
    282                                  raw_ostream &,
    283                                  bool /*DisableVerify*/ = true) {
    284     return true;
    285   }
    286 };
    287 
    288 /// LLVMTargetMachine - This class describes a target machine that is
    289 /// implemented with the LLVM target-independent code generator.
    290 ///
    291 class LLVMTargetMachine : public TargetMachine {
    292 protected: // Can only create subclasses.
    293   LLVMTargetMachine(const Target &T, StringRef TargetTriple,
    294                     StringRef CPU, StringRef FS, TargetOptions Options,
    295                     Reloc::Model RM, CodeModel::Model CM,
    296                     CodeGenOpt::Level OL);
    297 
    298   void initAsmInfo();
    299 public:
    300   /// \brief Register analysis passes for this target with a pass manager.
    301   ///
    302   /// This registers target independent analysis passes.
    303   virtual void addAnalysisPasses(PassManagerBase &PM);
    304 
    305   /// createPassConfig - Create a pass configuration object to be used by
    306   /// addPassToEmitX methods for generating a pipeline of CodeGen passes.
    307   virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
    308 
    309   /// addPassesToEmitFile - Add passes to the specified pass manager to get the
    310   /// specified file emitted.  Typically this will involve several steps of code
    311   /// generation.
    312   virtual bool addPassesToEmitFile(PassManagerBase &PM,
    313                                    formatted_raw_ostream &Out,
    314                                    CodeGenFileType FileType,
    315                                    bool DisableVerify = true,
    316                                    AnalysisID StartAfter = 0,
    317                                    AnalysisID StopAfter = 0);
    318 
    319   /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
    320   /// get machine code emitted.  This uses a JITCodeEmitter object to handle
    321   /// actually outputting the machine code and resolving things like the address
    322   /// of functions.  This method returns true if machine code emission is
    323   /// not supported.
    324   ///
    325   virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
    326                                           JITCodeEmitter &MCE,
    327                                           bool DisableVerify = true);
    328 
    329   /// addPassesToEmitMC - Add passes to the specified pass manager to get
    330   /// machine code emitted with the MCJIT. This method returns true if machine
    331   /// code is not supported. It fills the MCContext Ctx pointer which can be
    332   /// used to build custom MCStreamer.
    333   ///
    334   virtual bool addPassesToEmitMC(PassManagerBase &PM,
    335                                  MCContext *&Ctx,
    336                                  raw_ostream &OS,
    337                                  bool DisableVerify = true);
    338 
    339   /// addCodeEmitter - This pass should be overridden by the target to add a
    340   /// code emitter, if supported.  If this is not supported, 'true' should be
    341   /// returned.
    342   virtual bool addCodeEmitter(PassManagerBase &,
    343                               JITCodeEmitter &) {
    344     return true;
    345   }
    346 };
    347 
    348 } // End llvm namespace
    349 
    350 #endif
    351