/art/test/065-mismatched-implements/src/ |
Defs.java | 17 public interface Defs {
|
/art/test/066-mismatched-super/src2/ |
Defs.java | 17 public interface Defs {
|
/dalvik/tests/065-mismatched-implements/src/ |
Defs.java | 3 public interface Defs {
|
/dalvik/tests/066-mismatched-super/src2/ |
Defs.java | 3 public interface Defs {
|
/art/test/065-mismatched-implements/src2/ |
Defs.java | 17 public abstract class Defs {
|
/art/test/066-mismatched-super/src/ |
Defs.java | 17 public abstract class Defs {
|
/dalvik/tests/065-mismatched-implements/src2/ |
Defs.java | 3 public abstract class Defs {
|
/dalvik/tests/066-mismatched-super/src/ |
Defs.java | 3 public abstract class Defs {
|
/packages/apps/Music/tests/src/com/android/music/functional/ |
TestSongs.java | 72 inst.invokeContextMenuAction(getActivity(), MusicUtils.Defs.NEW_PLAYLIST, 0); 155 inst.invokeContextMenuAction(getActivity(), MusicUtils.Defs.USE_AS_RINGTONE, 0); 192 inst.invokeContextMenuAction(getActivity(), MusicUtils.Defs.DELETE_ITEM, 0);
|
TestPlaylist.java | 75 inst.invokeContextMenuAction(getActivity(), MusicUtils.Defs.CHILD_MENU_BASE + 1, 0); 95 inst.invokeContextMenuAction(trackBrowserActivity, MusicUtils.Defs.NEW_PLAYLIST, 0); 116 inst.invokeContextMenuAction(getActivity(), MusicUtils.Defs.CHILD_MENU_BASE + 3, 0);
|
/external/llvm/utils/TableGen/ |
CTagsEmitter.cpp | 74 const std::map<std::string, Record *> &Defs = Records.getDefs(); 77 Tags.reserve(Classes.size() + Defs.size()); 82 for (std::map<std::string, Record *>::const_iterator I = Defs.begin(), 83 E = Defs.end();
|
InstrInfoEmitter.cpp | 338 // Emit all of the instruction's implicit uses and defs. 347 std::vector<Record*> Defs = Inst->getValueAsListOfDefs("Defs"); 348 if (!Defs.empty()) { 349 unsigned &IL = EmittedLists[Defs]; 350 if (!IL) PrintDefList(Defs, IL = ++ListNumber, OS); 497 // Emit the implicit uses and defs lists... 504 std::vector<Record*> DefList = Inst.TheDef->getValueAsListOfDefs("Defs");
|
/packages/apps/Music/tests/src/com/android/music/stress/ |
MusicPlaybackStress.java | 61 inst.invokeMenuActionSync(getActivity(), MusicUtils.Defs.CHILD_MENU_BASE + 3, 0);
|
/external/llvm/lib/CodeGen/ |
MachineCopyPropagation.cpp | 71 const DestList& Defs = SI->second; 72 for (DestList::const_iterator I = Defs.begin(), E = Defs.end(); 233 SmallVector<unsigned, 2> Defs; 250 Defs.push_back(Reg); 289 for (unsigned i = 0, e = Defs.size(); i != e; ++i) { 290 unsigned Reg = Defs[i]; 304 // If MBB doesn't have successors, delete the copies whose defs are not used. 305 // If MBB does have successors, then conservative assume the defs are live-out
|
MachineInstrBundle.cpp | 98 /// bundle, and it copies externally visible defs and uses to the BUNDLE 122 SmallVector<MachineOperand*, 4> Defs; 129 Defs.push_back(&MO); 154 for (unsigned i = 0, e = Defs.size(); i != e; ++i) { 155 MachineOperand &MO = *Defs[i]; 182 Defs.clear(); 264 // Both defs and uses can read virtual registers. 271 // Only defs can write.
|
LiveVariables.cpp | 229 /// implicit defs to a machine instruction if there was an earlier def of its 444 SmallVectorImpl<unsigned> &Defs) { 483 Defs.push_back(Reg); // Remember this def. 487 SmallVectorImpl<unsigned> &Defs) { 488 while (!Defs.empty()) { 489 unsigned Reg = Defs.back(); 490 Defs.pop_back(); 534 SmallVector<unsigned, 4> Defs; 539 HandlePhysRegDef(*II, 0, Defs); 596 // Process all defs [all...] |
RegisterPressure.cpp | 344 /// Collect this instruction's unique uses and defs into SmallVectors for 345 /// processing defs and uses in order. 352 SmallVector<unsigned, 8> Defs; 368 pushRegUnits(MO.getReg(), Defs); 395 // Remove redundant physreg dead defs. 398 std::bind1st(std::ptr_fun(containsReg), RegOpers.Defs)); 466 // Boost pressure for all dead defs together. 470 // Kill liveness at live defs. 472 for (unsigned i = 0, e = RegOpers.Defs.size(); i < e; ++i) { 473 unsigned Reg = RegOpers.Defs[i] [all...] |
LiveDebugVariables.cpp | 235 /// points, and add defs if possible. 239 /// @param NewDefs Append (Idx, LocNo) of inserted defs here. 604 // Try to add defs of the copied values for each kill point. 634 SmallVector<std::pair<SlotIndex, unsigned>, 16> Defs; 636 // Collect all defs to be extended (Skipping undefs). 639 Defs.push_back(std::make_pair(I.start(), I.value())); 641 // Extend all defs, and possibly add new ones along the way. 642 for (unsigned i = 0; i != Defs.size(); ++i) { 643 SlotIndex Idx = Defs[i].first; 644 unsigned LocNo = Defs[i].second [all...] |
IfConversion.cpp | [all...] |
MachineLICM.cpp | 458 // FIXME: For now, avoid instructions with multiple defs, unless 466 // register, then this is not safe. Two defs is indicated by setting a 503 // Walk the entire region, count number of defs for each register, and 801 // defs as well. This happens whenever the preheader is created by splitting 844 SmallVector<unsigned, 4> Defs; 855 Defs.push_back(Reg); [all...] |
/frameworks/compile/mclinker/include/mcld/MC/ |
ZOption.h | 28 Defs,
|
/external/llvm/include/llvm/CodeGen/ |
ScheduleDAGInstrs.h | 75 /// Live Intervals provides reaching defs in preRA scheduling. 121 /// Defs, Uses - Remember where defs and uses of each register are as we 125 Reg2SUnitsMap Defs; 132 /// unknown store, as we iterate. As with Defs and Uses, this is here
|
/external/llvm/lib/Target/ARM/ |
Thumb2ITBlockPass.cpp | 44 SmallSet<unsigned, 4> &Defs, 55 SmallSet<unsigned, 4> &Defs, 85 Defs.insert(*Subreg); 106 SmallSet<unsigned, 4> &Defs, 121 if (Uses.count(DstReg) || Defs.count(SrcReg)) 163 SmallSet<unsigned, 4> Defs; 176 Defs.clear(); 178 TrackDefUses(MI, Defs, Uses, TRI); 215 MoveCopyOutOfITBlock(NMI, CC, OCC, Defs, Uses)) { 224 TrackDefUses(NMI, Defs, Uses, TRI) [all...] |
A15SDOptimizer.cpp | 414 SmallVector<unsigned, 8> Defs; 424 Defs.push_back(MO.getReg()); 426 return Defs; 615 SmallVector<unsigned, 8> Defs = getReadDPRs(MI); 618 for (SmallVectorImpl<unsigned>::iterator I = Defs.begin(), E = Defs.end(); 622 // we can end up with multiple defs of this DPR.
|
/external/llvm/lib/Target/Mips/ |
MipsDelaySlotFiller.cpp | 87 /// This function sets all caller-saved registers in Defs. 90 /// This function sets all unallocatable registers in Defs. 108 BitVector Defs, Uses; 160 /// Update Defs and Uses. Return true if there exist dependences that 162 /// Defs. 170 SmallPtrSet<const Value*, 4> Uses, Defs; 292 : TRI(*TM.getRegisterInfo()), Defs(TRI.getNumRegs(), false), 299 // If MI is a call, add RA to Defs to prevent users of RA from going into 302 Defs.set(Mips::RA); 308 Defs.reset(Mips::AT) [all...] |