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    Searched defs:Instructions (Results 1 - 25 of 25) sorted by null

  /external/chromium_org/sandbox/linux/seccomp-bpf/
codegen.h 19 typedef std::vector<Instruction *> Instructions;
26 // graph of BPF instructions into a well-formed stream of BPF instructions.
28 // the limit of 255 instructions imposed by the instruction set.
31 // build a DAG of Instructions. They'll eventually call Compile() to convert
34 // Instructions can be chained at the time when they are created, or they
65 // Create a new instruction. Instructions form a DAG. The instruction objects
75 // Join two (sequences of) instructions. This is useful, if the "next"
80 // Traverse the graph of instructions and visit each instruction once.
89 // Compiles the graph of instructions into a BPF program that can be passe
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  /external/llvm/include/llvm/MC/
MCWin64EH.h 68 Instructions() {}
79 std::vector<MCWin64EHInstruction> Instructions;
MCDwarf.h 174 /// for a section where machine instructions have been assembled after seeing
394 Function(0), Instructions(), PersonalityEncoding(),
402 std::vector<MCCFIInstruction> Instructions;
  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/
radeon_dataflow_deadcode.c 61 struct instruction_state * Instructions;
155 struct instruction_state * insts = &s->Instructions[inst->IP];
225 s.Instructions = memory_pool_malloc(&c->Pool, sizeof(struct instruction_state)*nr_instructions);
226 memset(s.Instructions, 0, sizeof(struct instruction_state)*nr_instructions);
230 for(struct rc_instruction * inst = c->Program.Instructions.Prev;
231 inst != &c->Program.Instructions;
313 for(struct rc_instruction * inst = c->Program.Instructions.Next;
314 inst != &c->Program.Instructions;
324 inst->U.I.DstReg.WriteMask = s.Instructions[ip].WriteMask;
325 if (s.Instructions[ip].WriteMask
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radeon_program.h 70 * Instructions are maintained by the compiler in a doubly linked list
101 * \name Extra fields for TEX, TXB, TXD, TXL, TXP instructions.
153 * Instructions.Next points to the first instruction,
154 * Instructions.Prev points to the last instruction.
156 struct rc_instruction Instructions;
  /external/llvm/lib/DebugInfo/
DWARFDebugFrame.cpp 38 /// \brief Parse and store a sequence of CFI instructions from our data
47 /// \brief Dump the entry's instructions to the given output stream.
63 /// An entry may contain CFI instructions. An instruction consists of an
75 std::vector<Instruction> Instructions;
78 /// operands to the Instructions vector.
80 Instructions.push_back(Instruction(Opcode));
84 Instructions.push_back(Instruction(Opcode));
85 Instructions.back().Ops.push_back(Operand1);
89 Instructions.push_back(Instruction(Opcode));
90 Instructions.back().Ops.push_back(Operand1)
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  /external/llvm/tools/bugpoint/
CrashDebugger.cpp 21 #include "llvm/IR/Instructions.h"
355 /// non-terminator instructions and replacing them with undef.
386 SmallPtrSet<Instruction*, 64> Instructions;
389 Instructions.insert(cast<Instruction>(VMap[Insts[i]]));
392 outs() << "Checking for crash with only " << Instructions.size();
393 if (Instructions.size() == 1)
396 outs() << " instructions: ";
402 if (!Instructions.count(Inst) && !isa<TerminatorInst>(Inst) &&
422 for (SmallPtrSet<Instruction*, 64>::const_iterator I = Instructions.begin(),
423 E = Instructions.end(); I != E; ++I
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  /external/llvm/utils/TableGen/
CodeGenTarget.h 68 mutable DenseMap<const Record*, CodeGenInstruction*> Instructions;
150 if (Instructions.empty()) ReadInstructions();
151 return Instructions;
156 if (Instructions.empty()) ReadInstructions();
158 Instructions.find(InstRec);
159 assert(I != Instructions.end() && "Not an instruction");
163 /// getInstructionsByEnumValue - Return all of the instructions defined by the
CodeGenDAGPatterns.cpp 11 // represent the patterns present in a .td file for instructions.
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