| /art/test/040-miranda/src/ |
| Main.java | 22 MirandaClass mir = new MirandaClass(); local
24 System.out.println(" inInterface: " + mir.inInterface());
25 System.out.println(" inInterface2: " + mir.inInterface2());
26 System.out.println(" inAbstract: " + mir.inAbstract());
29 MirandaAbstract mira = mir;
|
| /dalvik/tests/040-miranda/src/ |
| Main.java | 8 MirandaClass mir = new MirandaClass(); local
10 System.out.println(" inInterface: " + mir.inInterface());
11 System.out.println(" inInterface2: " + mir.inInterface2());
12 System.out.println(" inAbstract: " + mir.inAbstract());
15 MirandaAbstract mira = mir;
|
| /dalvik/vm/compiler/ |
| Ralloc.cpp | 29 MIR *mir; local
33 for (mir = bb->firstMIRInsn; mir; mir = mir->next) {
34 SSARepresentation *ssaRep = mir->ssaRep;
|
| Loop.cpp | 206 MIR *branch = loopBackBlock->lastMIRInsn;
346 MIR *mir; local
349 for (mir = loopBody->firstMIRInsn; mir; mir = mir->next) {
350 DecodedInstruction *dInsn = &mir->dalvikInsn;
352 dvmCompilerDataFlowAttributes[mir->dalvikInsn.opcode];
354 /* Skip extended MIR instructions *
[all...] |
| SSATransformation.cpp | 488 MIR *phi = (MIR *) dvmCompilerNew(sizeof(MIR), true);
506 MIR *mir; local
509 for (mir = bb->firstMIRInsn; mir; mir = mir->next) {
510 if (mir->dalvikInsn.opcode != (Opcode)kMirOpPhi
[all...] |
| Dataflow.cpp | 25 * instructions, where extended opcode at the MIR level are appended
801 // Beginning of extended MIR opcodes
805 * For extended MIR inserted at the MIR2LIR stage, it is okay to have
922 const MIR *mir)
926 const DecodedInstruction *insn = &mir->dalvikInsn;
937 getSSAName(cUnit, mir->ssaRep->defs[0], operand0),
938 getSSAName(cUnit, mir->ssaRep->uses[0], operand1));
940 for (i = 1; i < mir->ssaRep->numUses; i++) {
942 getSSAName(cUnit, mir->ssaRep->uses[i], operand0))
1110 MIR *mir; local
1217 MIR *mir; local
1348 MIR *mir; local
1425 MIR *mir; local
[all...] |
| Frontend.cpp | 63 static inline bool findBlockBoundary(const Method *caller, MIR *insn,
164 static inline bool isGoto(MIR *insn)
179 static inline bool isUnconditionalBranch(MIR *insn)
517 MIR *insn = origBlock->firstMIRInsn;
689 const MIR *mir; local
692 for (mir = bb->firstMIRInsn; mir; mir = mir->next)
[all...] |
| /art/compiler/dex/quick/ |
| mir_to_lir.cc | 29 void Mir2Lir::CompileDalvikInstruction(MIR* mir, BasicBlock* bb, LIR* label_list) {
33 Instruction::Code opcode = mir->dalvikInsn.opcode;
34 int opt_flags = mir->optimization_flags;
35 uint32_t vB = mir->dalvikInsn.vB;
36 uint32_t vC = mir->dalvikInsn.vC;
45 rl_src[next_loc++] = mir_graph_->GetSrcWide(mir, next_sreg);
48 rl_src[next_loc++] = mir_graph_->GetSrc(mir, next_sreg);
54 rl_src[next_loc++] = mir_graph_->GetSrcWide(mir, next_sreg);
57 rl_src[next_loc++] = mir_graph_->GetSrc(mir, next_sreg)
692 MIR* mir; local
802 MIR* mir = bb->first_mir_insn; local
[all...] |
| /art/compiler/dex/ |
| vreg_analysis.cc | 76 MIR *mir; local
83 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
84 SSARepresentation *ssa_rep = mir->ssa_rep;
86 int attrs = oat_data_flow_attributes_[mir->dalvikInsn.opcode];
160 if ((mir->dalvikInsn.opcode == Instruction::RETURN) ||
161 (mir->dalvikInsn.opcode == Instruction::RETURN_WIDE) |
[all...] |
| mir_dataflow.cc | 26 * instructions, where extended opcode at the MIR level are appended
801 // Beginning of extended MIR opcodes
869 MIR* mir; local
881 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
882 int df_attributes = oat_data_flow_attributes_[mir->dalvikInsn.opcode];
883 DecodedInstruction *d_insn = &mir->dalvikInsn
988 MIR* mir; local
[all...] |
| mir_optimization.cc | 40 MIR* mir; local
42 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
43 int df_attributes = oat_data_flow_attributes_[mir->dalvikInsn.opcode];
45 DecodedInstruction *d_insn = &mir->dalvikInsn;
57 SetConstant(mir->ssa_rep->defs[0], vB);
60 SetConstant(mir->ssa_rep->defs[0], vB << 16)
566 MIR* mir = bb->last_mir_insn; local
[all...] |
| ssa_transformation.cc | 566 MIR *phi =
567 static_cast<MIR*>(arena_->Alloc(sizeof(MIR), ArenaAllocator::kAllocDFInfo));
582 MIR *mir; local
587 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
588 if (mir->dalvikInsn.opcode != static_cast<Instruction::Code>(kMirOpPhi)
[all...] |
| mir_graph.cc | 133 MIR* insn = orig_block->first_mir_insn;
278 BasicBlock* MIRGraph::ProcessCanBranch(BasicBlock* cur_block, MIR* insn, int cur_offset, int width,
344 void MIRGraph::ProcessCanSwitch(BasicBlock* cur_block, MIR* insn, int cur_offset, int width,
420 BasicBlock* MIRGraph::ProcessCanThrow(BasicBlock* cur_block, MIR* insn, int cur_offset, int width,
484 * pseudo exception edge MIR. Note also that this new block is
493 MIR* new_insn = static_cast<MIR*>(arena_->Alloc(sizeof(MIR), ArenaAllocator::kAllocMIR));
512 // TODO: will need to snapshot stack image and use that as the mir context identification.
579 MIR *insn = static_cast<MIR *>(arena_->Alloc(sizeof(MIR), ArenaAllocator::kAllocMIR))
739 const MIR *mir; local
[all...] |
| /external/clang/test/SemaCXX/ |
| class.cpp | 70 mutable int &mir; // expected-error {{'mutable' cannot be applied to references}} member in class:C
|
| /dalvik/vm/compiler/codegen/x86/ |
| CodegenInterface.cpp | 788 static void genHoistedChecksForCountUpLoop(CompilationUnit *cUnit, MIR *mir)
796 DecodedInstruction *dInsn = &mir->dalvikInsn;
800 get_virtual_reg(mir->dalvikInsn.vA, OpndSize_32, P_GPR_1, true);
802 get_virtual_reg(mir->dalvikInsn.vC, OpndSize_32, P_GPR_2, true);
833 static void genHoistedChecksForCountDownLoop(CompilationUnit *cUnit, MIR *mir)
835 DecodedInstruction *dInsn = &mir->dalvikInsn;
839 get_virtual_reg(mir->dalvikInsn.vA, OpndSize_32, P_GPR_1, true);
841 get_virtual_reg(mir->dalvikInsn.vB, OpndSize_32, P_GPR_2, true)
1129 MIR *mir; local
[all...] |
| AnalysisO1.cpp | 514 /* create a O1 basic block from basic block constructed in JIT MIR */
521 /* a basic block in JIT MIR can contain bytecodes that are not in program order
662 MIR* mir; local
664 /* traverse the MIR in basic block
666 for(mir = bb->jitBasicBlock->firstMIRInsn; mir; mir = mir->next) {
668 mir->seqNum = seqNum++
774 MIR* mir; local
[all...] |
| /dalvik/vm/compiler/codegen/arm/ |
| CodegenDriver.cpp | 47 static bool genConversionCall(CompilationUnit *cUnit, MIR *mir, void *funct,
58 rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
61 rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
69 rlDest = dvmCompilerGetDest(cUnit, mir, 0);
74 rlDest = dvmCompilerGetDestWide(cUnit, mir, 0, 1);
81 static bool genArithOpFloatPortable(CompilationUnit *cUnit, MIR *mir,
88 switch (mir->dalvikInsn.opcode) {
127 static bool genArithOpDoublePortable(CompilationUnit *cUnit, MIR *mir
4207 MIR *mir; local
[all...] |
| /dalvik/vm/compiler/codegen/mips/ |
| CodegenDriver.cpp | 47 static bool genConversionCall(CompilationUnit *cUnit, MIR *mir, void *funct,
85 rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
88 rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
97 rlDest = dvmCompilerGetDest(cUnit, mir, 0);
109 rlDest = dvmCompilerGetDestWide(cUnit, mir, 0, 1);
124 static bool genArithOpFloatPortable(CompilationUnit *cUnit, MIR *mir,
131 switch (mir->dalvikInsn.opcode) {
181 static bool genArithOpDoublePortable(CompilationUnit *cUnit, MIR *mir
4335 MIR *mir; local
[all...] |
| /dalvik/vm/oo/ |
| Class.cpp | 3283 int mir; local
[all...] |
