| /external/llvm/lib/Target/R600/ |
| SIISelLowering.h | 1 //===-- SIISelLowering.h - SI DAG Lowering Interface ------------*- C++ -*-===//
11 /// \brief SI DAG Lowering interface definition
24 SDValue LowerParameter(SelectionDAG &DAG, EVT VT, SDLoc DL,
26 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
27 SDValue LowerSIGN_EXTEND(SDValue Op, SelectionDAG &DAG) const;
28 SDValue LowerZERO_EXTEND(SDValue Op, SelectionDAG &DAG) const;
29 SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const;
33 const TargetRegisterClass *getRegClassForNode(SelectionDAG &DAG,
35 bool fitsRegClass(SelectionDAG &DAG, const SDValue &Op,
37 void ensureSRegLimit(SelectionDAG &DAG, SDValue &Operand
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| R600ISelLowering.h | 1 //===-- R600ISelLowering.h - R600 DAG Lowering Interface -*- C++ -*--------===//
11 /// \brief R600 DAG Lowering interface definition
29 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
33 SelectionDAG &DAG) const;
39 SDLoc DL, SelectionDAG &DAG,
48 SDValue LowerImplicitParameter(SelectionDAG &DAG, EVT VT,
53 SDValue OptimizeSwizzle(SDValue BuildVector, SDValue Swz[], SelectionDAG &DAG) const;
56 SDValue LowerROTL(SDValue Op, SelectionDAG &DAG) const;
58 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
59 SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG) const
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| AMDGPUISelLowering.h | 28 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
29 SDValue LowerUDIVREM(SDValue Op, SelectionDAG &DAG) const;
33 /// \brief Helper function that adds Reg to the LiveIn list of the DAG's
37 virtual SDValue CreateLiveInRegister(SelectionDAG &DAG,
41 SelectionDAG &DAG) const;
59 SDLoc DL, SelectionDAG &DAG) const;
66 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
67 SDValue LowerIntrinsicIABS(SDValue Op, SelectionDAG &DAG) const;
68 SDValue LowerIntrinsicLRP(SDValue Op, SelectionDAG &DAG) const;
69 SDValue LowerMinMax(SDValue Op, SelectionDAG &DAG) const
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| AMDGPUISelLowering.cpp | 1 //===-- AMDGPUISelLowering.cpp - AMDGPU Common DAG lowering functions -----===//
163 SDLoc DL, SelectionDAG &DAG) const {
164 return DAG.getNode(AMDGPUISD::RET_FLAG, DL, MVT::Other, Chain);
171 SDValue AMDGPUTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG)
179 // AMDIL DAG lowering
180 case ISD::SDIV: return LowerSDIV(Op, DAG);
181 case ISD::SREM: return LowerSREM(Op, DAG);
182 case ISD::SIGN_EXTEND_INREG: return LowerSIGN_EXTEND_INREG(Op, DAG);
183 case ISD::BRCOND: return LowerBRCOND(Op, DAG);
184 // AMDGPU DAG lowerin
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDGPUISelLowering.cpp | 1 //===-- AMDGPUISelLowering.cpp - AMDGPU Common DAG lowering functions -----===//
53 DebugLoc DL, SelectionDAG &DAG,
70 DebugLoc DL, SelectionDAG &DAG) const
72 return DAG.getNode(AMDGPUISD::RET_FLAG, DL, MVT::Other, Chain);
79 SDValue AMDGPUTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG)
88 // AMDIL DAG lowering
89 case ISD::SDIV: return LowerSDIV(Op, DAG);
90 case ISD::SREM: return LowerSREM(Op, DAG);
91 case ISD::BUILD_VECTOR: return LowerBUILD_VECTOR(Op, DAG);
92 case ISD::SIGN_EXTEND_INREG: return LowerSIGN_EXTEND_INREG(Op, DAG);
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| R600ISelLowering.h | 1 //===-- R600ISelLowering.h - R600 DAG Lowering Interface -*- C++ -*--------===//
10 // R600 DAG Lowering interface definition
29 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
38 SDValue LowerImplicitParameter(SelectionDAG &DAG, EVT VT,
44 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
47 SDValue LowerROTL(SDValue Op, SelectionDAG &DAG) const;
49 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
50 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const;
|
| AMDGPUISelLowering.h | 27 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
28 SDValue LowerUDIVREM(SDValue Op, SelectionDAG &DAG) const;
33 /// of the DAG's MachineFunction. This returns a Register SDNode representing
35 SDValue CreateLiveInRegister(SelectionDAG &DAG, const TargetRegisterClass *RC,
47 DebugLoc DL, SelectionDAG &DAG,
54 DebugLoc DL, SelectionDAG &DAG) const;
56 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
57 SDValue LowerIntrinsicIABS(SDValue Op, SelectionDAG &DAG) const;
58 SDValue LowerIntrinsicLRP(SDValue Op, SelectionDAG &DAG) const;
70 const SelectionDAG &DAG,
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDGPUISelLowering.cpp | 1 //===-- AMDGPUISelLowering.cpp - AMDGPU Common DAG lowering functions -----===//
53 DebugLoc DL, SelectionDAG &DAG,
70 DebugLoc DL, SelectionDAG &DAG) const
72 return DAG.getNode(AMDGPUISD::RET_FLAG, DL, MVT::Other, Chain);
79 SDValue AMDGPUTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG)
88 // AMDIL DAG lowering
89 case ISD::SDIV: return LowerSDIV(Op, DAG);
90 case ISD::SREM: return LowerSREM(Op, DAG);
91 case ISD::BUILD_VECTOR: return LowerBUILD_VECTOR(Op, DAG);
92 case ISD::SIGN_EXTEND_INREG: return LowerSIGN_EXTEND_INREG(Op, DAG);
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| R600ISelLowering.h | 1 //===-- R600ISelLowering.h - R600 DAG Lowering Interface -*- C++ -*--------===//
10 // R600 DAG Lowering interface definition
29 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
38 SDValue LowerImplicitParameter(SelectionDAG &DAG, EVT VT,
44 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
47 SDValue LowerROTL(SDValue Op, SelectionDAG &DAG) const;
49 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
50 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const;
|
| AMDGPUISelLowering.h | 27 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
28 SDValue LowerUDIVREM(SDValue Op, SelectionDAG &DAG) const;
33 /// of the DAG's MachineFunction. This returns a Register SDNode representing
35 SDValue CreateLiveInRegister(SelectionDAG &DAG, const TargetRegisterClass *RC,
47 DebugLoc DL, SelectionDAG &DAG,
54 DebugLoc DL, SelectionDAG &DAG) const;
56 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
57 SDValue LowerIntrinsicIABS(SDValue Op, SelectionDAG &DAG) const;
58 SDValue LowerIntrinsicLRP(SDValue Op, SelectionDAG &DAG) const;
70 const SelectionDAG &DAG,
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| /external/llvm/lib/Target/X86/ |
| X86SelectionDAGInfo.cpp | 30 X86SelectionDAGInfo::EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
57 Type *IntPtrTy = getDataLayout()->getIntPtrType(*DAG.getContext());
66 CallLoweringInfo CLI(Chain, Type::getVoidTy(*DAG.getContext()),
70 DAG.getExternalSymbol(bzeroEntry, IntPtr), Args,
71 DAG, dl);
113 Count = DAG.getIntPtrConstant(SizeVal);
119 Count = DAG.getIntPtrConstant(SizeVal / UBytes);
123 Chain = DAG.getCopyToReg(Chain, dl, ValReg, DAG.getConstant(Val, AVT),
128 Count = DAG.getIntPtrConstant(SizeVal)
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| X86ISelLowering.h | 1 //===-- X86ISelLowering.h - X86 DAG Lowering Interface ----------*- C++ -*-===//
11 // selection DAG.
29 // X86 Specific DAG Nodes
521 SelectionDAG &DAG) const;
563 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
569 SelectionDAG &DAG) const;
592 /// DAG node.
604 const SelectionDAG &DAG,
615 SDValue getReturnAddressFrameIndex(SelectionDAG &DAG) const;
635 SelectionDAG &DAG) const
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| /external/llvm/lib/Target/SystemZ/ |
| SystemZSelectionDAGInfo.cpp | 29 EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc DL, SDValue Chain,
41 return DAG.getNode(SystemZISD::MVC, DL, MVT::Other,
51 static SDValue memsetStore(SelectionDAG &DAG, SDLoc DL, SDValue Chain,
58 return DAG.getStore(Chain, DL,
59 DAG.getConstant(StoreVal, MVT::getIntegerVT(Size * 8)),
64 EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc DL, SDValue Chain,
88 SDValue Chain1 = memsetStore(DAG, DL, Chain, Dst, ByteVal, Size1,
92 Dst = DAG.getNode(ISD::ADD, DL, DstVT, Dst,
93 DAG.getConstant(Size1, DstVT));
95 SDValue Chain2 = memsetStore(DAG, DL, Chain, Dst, ByteVal, Size2
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| /external/llvm/lib/Target/ARM/ |
| ARMHazardRecognizer.h | 36 const ScheduleDAG *DAG)
37 : ScoreboardHazardRecognizer(ItinData, DAG, "post-RA-sched"),
|
| ARMSelectionDAGInfo.cpp | 29 ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
66 Loads[i] = DAG.getLoad(VT, dl, Chain,
67 DAG.getNode(ISD::ADD, dl, MVT::i32, Src,
68 DAG.getConstant(SrcOff, MVT::i32)),
74 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
78 TFOps[i] = DAG.getStore(Chain, dl, Loads[i],
79 DAG.getNode(ISD::ADD, dl, MVT::i32, Dst,
80 DAG.getConstant(DstOff, MVT::i32)),
85 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
105 Loads[i] = DAG.getLoad(VT, dl, Chain
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| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.h | 1 //===-- HexagonISelLowering.h - Hexagon DAG Lowering Interface --*- C++ -*-===//
11 // selection DAG.
93 SelectionDAG& DAG) const;
100 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
103 SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
104 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
105 SDValue LowerINLINEASM(SDValue Op, SelectionDAG &DAG) const;
106 SDValue LowerEH_LABEL(SDValue Op, SelectionDAG &DAG) const;
107 SDValue LowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const;
111 SDLoc dl, SelectionDAG &DAG,
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| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.h | 1 //===-- MSP430ISelLowering.h - MSP430 DAG Lowering Interface ----*- C++ -*-===//
11 // selection DAG.
79 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
82 /// DAG node.
85 SDValue LowerShifts(SDValue Op, SelectionDAG &DAG) const;
86 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
87 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
88 SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const;
89 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
90 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const
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| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.h | 1 //==-- AArch64ISelLowering.h - AArch64 DAG Lowering Interface ----*- C++ -*-==//
11 // selection DAG.
49 // load instruction. This prevents the DAG combiner folding a truncate to
64 /// these are pre-encoded since DAG matching can't cope with combining LSB
101 /// these are pre-encoded since DAG matching can't cope with combining LSB
154 SDLoc dl, SelectionDAG &DAG,
161 SDLoc dl, SelectionDAG &DAG) const;
169 SDLoc dl, SelectionDAG &DAG,
172 SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG,
175 void SaveVarArgRegisters(CCState &CCInfo, SelectionDAG &DAG, SDLoc DL
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| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.h | 1 //===-- PPCISelLowering.h - PPC32 DAG Lowering Interface --------*- C++ -*-===//
11 // selection DAG.
333 SDValue get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG);
343 /// DAG node.
357 SelectionDAG &DAG) const;
363 SelectionDAG &DAG) const;
370 SelectionDAG &DAG, bool Aligned) const;
375 SelectionDAG &DAG) const;
381 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
387 SelectionDAG &DAG) const
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| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 1 //===-- SparcISelLowering.cpp - Sparc DAG Lowering Implementation ---------===//
11 // selection DAG.
167 SDLoc DL, SelectionDAG &DAG) const {
169 return LowerReturn_64(Chain, CallConv, IsVarArg, Outs, OutVals, DL, DAG);
170 return LowerReturn_32(Chain, CallConv, IsVarArg, Outs, OutVals, DL, DAG);
178 SDLoc DL, SelectionDAG &DAG) const {
179 MachineFunction &MF = DAG.getMachineFunction();
185 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(),
186 DAG.getTarget(), RVLocs, *DAG.getContext())
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| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.h | 1 //===-- XCoreISelLowering.h - XCore DAG Lowering Interface ------*- C++ -*-===//
11 // selection DAG.
90 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
96 SelectionDAG &DAG) const;
99 // DAG node.
118 SDLoc dl, SelectionDAG &DAG,
126 SDLoc dl, SelectionDAG &DAG,
131 SDLoc dl, SelectionDAG &DAG,
133 SDValue getReturnAddressFrameIndex(SelectionDAG &DAG) const;
135 SelectionDAG &DAG) const
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| XCoreISelLowering.cpp | 1 //===-- XCoreISelLowering.cpp - XCore DAG Lowering Implementation ---------===//
162 // We have target-specific dag combine patterns for the following nodes:
170 LowerOperation(SDValue Op, SelectionDAG &DAG) const {
173 case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG);
174 case ISD::BlockAddress: return LowerBlockAddress(Op, DAG);
175 case ISD::ConstantPool: return LowerConstantPool(Op, DAG);
176 case ISD::BR_JT: return LowerBR_JT(Op, DAG);
177 case ISD::LOAD: return LowerLOAD(Op, DAG);
178 case ISD::STORE: return LowerSTORE(Op, DAG);
179 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
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| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 1 //===-- MipsSEISelLowering.cpp - MipsSE DAG Lowering Interface --*- C++ -*-===//
143 SelectionDAG &DAG) const {
145 case ISD::SMUL_LOHI: return lowerMulDiv(Op, MipsISD::Mult, true, true, DAG);
146 case ISD::UMUL_LOHI: return lowerMulDiv(Op, MipsISD::Multu, true, true, DAG);
147 case ISD::MULHS: return lowerMulDiv(Op, MipsISD::Mult, false, true, DAG);
148 case ISD::MULHU: return lowerMulDiv(Op, MipsISD::Multu, false, true, DAG);
149 case ISD::MUL: return lowerMulDiv(Op, MipsISD::Mult, true, false, DAG);
150 case ISD::SDIVREM: return lowerMulDiv(Op, MipsISD::DivRem, true, true, DAG);
152 DAG);
153 case ISD::INTRINSIC_WO_CHAIN: return lowerINTRINSIC_WO_CHAIN(Op, DAG);
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorOps.cpp | 36 SelectionDAG& DAG;
83 VectorLegalizer(SelectionDAG& dag) :
84 DAG(dag), TLI(dag.getTargetLoweringInfo()), Changed(false) {}
90 for (SelectionDAG::allnodes_iterator I = DAG.allnodes_begin(),
91 E = prior(DAG.allnodes_end()); I != llvm::next(E); ++I) {
113 DAG.AssignTopologicalOrder();
114 for (SelectionDAG::allnodes_iterator I = DAG.allnodes_begin(),
115 E = prior(DAG.allnodes_end()); I != llvm::next(E); ++I
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| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.h | 1 //===-- NVPTXISelLowering.h - NVPTX DAG Lowering Interface ------*- C++ -*-===//
11 // selection DAG.
82 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
84 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
86 SelectionDAG &DAG) const;
117 const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG,
132 SelectionDAG &DAG) const;
136 SelectionDAG &DAG) const;
148 SDValue getExtSymb(SelectionDAG &DAG, const char *name, int idx,
150 SDValue getParamSymbol(SelectionDAG &DAG, int idx, EVT) const
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