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Searched
refs:EXTRACT_SUBREG
(Results
1 - 13
of
13
) sorted by null
/external/llvm/include/llvm/Target/
TargetOpcodes.h
37
///
EXTRACT_SUBREG
- This instruction takes two operands: a register
41
EXTRACT_SUBREG
= 6,
/external/llvm/lib/CodeGen/
ExpandPostRAPseudos.cpp
218
case TargetOpcode::
EXTRACT_SUBREG
:
/external/llvm/lib/CodeGen/SelectionDAG/
ResourcePriorityQueue.cpp
264
case TargetOpcode::
EXTRACT_SUBREG
:
304
case TargetOpcode::
EXTRACT_SUBREG
:
InstrEmitter.cpp
471
if (Opc == TargetOpcode::
EXTRACT_SUBREG
) {
472
//
EXTRACT_SUBREG
is lowered as %dst = COPY %src:sub. There are no
488
// r1026 =
extract_subreg
r1025, 4
507
// Create the
extract_subreg
machine instruction.
557
llvm_unreachable("Node is not insert_subreg,
extract_subreg
, or subreg_to_reg");
700
if (Opc == TargetOpcode::
EXTRACT_SUBREG
||
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...]
ScheduleDAGRRList.cpp
[
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SelectionDAG.cpp
[
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/external/llvm/lib/Target/Hexagon/
HexagonMachineScheduler.cpp
53
case TargetOpcode::
EXTRACT_SUBREG
:
105
case TargetOpcode::
EXTRACT_SUBREG
:
/external/llvm/lib/Target/R600/
SIISelLowering.cpp
713
case AMDGPU::
EXTRACT_SUBREG
: {
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...]
/external/llvm/lib/Target/SystemZ/
SystemZISelDAGToDAG.cpp
793
SDNode *Extract = CurDAG->getMachineNode(TargetOpcode::
EXTRACT_SUBREG
,
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...]
SystemZISelLowering.cpp
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...]
/external/llvm/lib/Target/ARM/
ARMISelDAGToDAG.cpp
[
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/external/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp
[
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...]
/external/llvm/lib/Target/X86/
X86ISelDAGToDAG.cpp
[
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...]
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