| /external/llvm/include/llvm/IR/ |
| Constant.h | 47 Constant(Type *ty, ValueTy vty, Use *Ops, unsigned NumOps)
48 : User(ty, vty, Ops, NumOps) {}
|
| InlineAsm.h | 233 static unsigned getFlagWord(unsigned Kind, unsigned NumOps) {
234 assert(((NumOps << 3) & ~0xffff) == 0 && "Too many inline asm operands!");
236 return Kind | (NumOps << 3);
|
| User.h | 52 User(Type *ty, unsigned vty, Use *OpList, unsigned NumOps)
53 : Value(ty, vty), OperandList(OpList), NumOperands(NumOps) {}
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| GlobalValue.h | 60 GlobalValue(Type *ty, ValueTy vty, Use *Ops, unsigned NumOps,
62 : Constant(ty, vty, Ops, NumOps), Linkage(linkage),
|
| Instruction.h | 445 Instruction(Type *Ty, unsigned iType, Use *Ops, unsigned NumOps,
447 Instruction(Type *Ty, unsigned iType, Use *Ops, unsigned NumOps,
|
| InstrTypes.h | 38 Use *Ops, unsigned NumOps,
40 : Instruction(Ty, iType, Ops, NumOps, InsertBefore) {}
43 Use *Ops, unsigned NumOps, BasicBlock *InsertAtEnd)
44 : Instruction(Ty, iType, Ops, NumOps, InsertAtEnd) {}
[all...] |
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86BaseInfo.h | 566 unsigned NumOps = Desc.getNumOperands();
568 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0)
570 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 &&
575 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 &&
576 Desc.getOperandConstraint(NumOps - 1, MCOI::TIED_TO) == 1)
580 else if (NumOps > 2 && Desc.getOperandConstraint(NumOps - 2, MCOI::TIED_TO) == 0)
|
| X86MCCodeEmitter.cpp | 677 unsigned NumOps = Desc.getNumOperands();
679 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0)
681 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 &&
686 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 &&
687 Desc.getOperandConstraint(NumOps - 1, MCOI::TIED_TO) == 1)
691 else if (NumOps > 2 && Desc.getOperandConstraint(NumOps - 2, MCOI::TIED_TO) == 0)
[all...] |
| /external/llvm/lib/CodeGen/ |
| MachineRegisterInfo.cpp | 141 unsigned NumOps = MI->getNumOperands();
142 if (!(MO >= MO0 && MO < MO0+NumOps)) {
236 /// Move NumOps operands from Src to Dst, updating use-def lists as needed.
245 unsigned NumOps) {
246 assert(Src != Dst && NumOps && "Noop moveOperands");
250 if (Dst >= Src && Dst < Src + NumOps) {
252 Dst += NumOps - 1;
253 Src += NumOps - 1;
282 } while (--NumOps);
|
| CallingConvLower.cpp | 120 unsigned NumOps = Outs.size();
121 for (unsigned i = 0; i != NumOps; ++i) {
139 unsigned NumOps = ArgVTs.size();
140 for (unsigned i = 0; i != NumOps; ++i) {
|
| MachineInstr.cpp | 538 if (unsigned NumOps = MCID->getNumOperands() +
540 CapOperands = OperandCapacity::get(NumOps);
601 /// Move NumOps MachineOperands from Src to Dst, with support for overlapping
604 unsigned NumOps, MachineRegisterInfo *MRI) {
606 return MRI->moveOperands(Dst, Src, NumOps);
611 for (unsigned i = 0; i != NumOps; ++i)
614 for (unsigned i = NumOps; i ; --i)
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonCallingConvLower.cpp | 136 unsigned NumOps = Outs.size();
146 for (; i != NumOps; ++i) {
164 unsigned NumOps = ArgVTs.size();
165 for (unsigned i = 0; i != NumOps; ++i) {
|
| /external/llvm/lib/Target/X86/ |
| X86CodeEmitter.cpp | 172 unsigned NumOps = Desc.getNumOperands();
173 if (NumOps) {
174 bool isTwoAddr = NumOps > 1 &&
179 for (unsigned e = NumOps; i != e; ++i) {
197 for (unsigned e = NumOps; i != e; ++i) {
209 for (; i != NumOps; ++i) {
226 if (NumOps > e && X86InstrInfo::isX86_64ExtendedReg(MI.getOperand(e)))
243 for (unsigned e = NumOps; i != e; ++i) {
[all...] |
| X86FloatingPoint.cpp | [all...] |
| /external/llvm/include/llvm/CodeGen/ |
| SelectionDAG.h | 562 const SDUse *Ops, unsigned NumOps);
564 const SDValue *Ops, unsigned NumOps);
567 const SDValue *Ops, unsigned NumOps);
569 const SDValue *Ops, unsigned NumOps);
571 const SDValue *Ops, unsigned NumOps);
686 const SDValue *Ops, unsigned NumOps,
692 const SDValue *Ops, unsigned NumOps,
698 const SDValue *Ops, unsigned NumOps,
702 SDValue getMergeValues(const SDValue *Ops, unsigned NumOps, SDLoc dl);
[all...] |
| SelectionDAGISel.h | 249 const SDValue *Ops, unsigned NumOps, unsigned EmitNodeInfo);
|
| SelectionDAGNodes.h | 700 const SDValue *Ops, unsigned NumOps)
703 OperandList(NumOps ? new SDUse[NumOps] : 0),
705 NumOperands(NumOps), NumValues(VTs.NumVTs),
707 for (unsigned i = 0; i != NumOps; ++i) {
[all...] |
| /external/llvm/lib/Target/ARM/ |
| Thumb2SizeReduction.cpp | 702 unsigned NumOps = MCID.getNumOperands();
703 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR);
704 if (HasCC && MI->getOperand(NumOps-1).isDead())
728 unsigned NumOps = MCID.getNumOperands();
730 if (i < NumOps && MCID.OpInfo[i].isOptionalDef())
798 unsigned NumOps = MCID.getNumOperands();
799 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR);
800 if (HasCC && MI->getOperand(NumOps-1).isDead())
824 unsigned NumOps = MCID.getNumOperands();
826 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()
[all...] |
| /external/llvm/utils/TableGen/ |
| AsmWriterEmitter.cpp | 403 unsigned NumOps = NumInstOpsHandled[InstIdxs[i]];
404 assert(NumOps <= Inst->Operands.size() &&
407 Inst->Operands.begin()+NumOps);
738 unsigned NumOps = 0;
742 ++NumOps;
746 return NumOps;
750 unsigned NumOps = 0;
762 ++NumOps;
767 return NumOps;
[all...] |
| CodeGenInstruction.cpp | 71 unsigned NumOps = 1;
91 NumOps = NumArgs;
116 OperandType, MIOperandNo, NumOps,
118 MIOperandNo += NumOps;
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAG.cpp | 338 const SDValue *Ops, unsigned NumOps) {
339 for (; NumOps; --NumOps, ++Ops) {
348 const SDUse *Ops, unsigned NumOps) {
349 for (; NumOps; --NumOps, ++Ops) {
770 const SDValue *Ops,unsigned NumOps,
776 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
[all...] |
| ScheduleDAGFast.cpp | 487 unsigned NumOps = Node->getNumOperands();
488 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue)
489 --NumOps; // Ignore the glue operand.
491 for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) {
674 unsigned NumOps = N->getNumOperands();
675 if (unsigned NumLeft = NumOps) {
681 if (NumLeft == NumOps && Op.getValueType() == MVT::Glue) {
|
| LegalizeTypes.cpp | 415 for (unsigned i = 0, NumOps = I->getNumOperands(); i < NumOps; ++i)
[all...] |
| /external/llvm/lib/IR/ |
| Instruction.cpp | 24 Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps,
26 : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(0) {
38 Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps,
40 : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(0) {
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZInstrInfo.cpp | 460 unsigned NumOps = OldMI->getNumOperands();
461 for (unsigned I = 1; I < NumOps; ++I) {
478 unsigned NumOps = MI->getNumOperands();
495 for (unsigned I = 2; I < NumOps; ++I)
608 unsigned NumOps = MI->getNumExplicitOperands();
609 if (OpNum == NumOps - 1) {
|
